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ARM: Get rid of some unneeded register indexes.

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This commit is contained in:
Gabe Black 2009-11-07 22:34:33 -08:00
parent 5cf2e7ccf0
commit 18b21c1eca
1 changed files with 0 additions and 30 deletions
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30
src/arch/arm/registers.hh
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@ -77,7 +77,6 @@ const int ReturnAddressReg = 14;
const int PCReg = 15; const int PCReg = 15;
const int ZeroReg = NumIntArchRegs; const int ZeroReg = NumIntArchRegs;
const int AddrReg = ZeroReg + 1; // Used to generate address for uops
const int SyscallNumReg = ReturnValueReg; const int SyscallNumReg = ReturnValueReg;
const int SyscallPseudoReturnReg = ReturnValueReg; const int SyscallPseudoReturnReg = ReturnValueReg;
@ -116,35 +115,6 @@ enum FCSRFields {
Cause_Field = 11 Cause_Field = 11
}; };
enum MiscIntRegNums {
zero_reg = NumIntArchRegs,
addr_reg,
rhi,
rlo,
r8_fiq, /* FIQ mode register bank */
r9_fiq,
r10_fiq,
r11_fiq,
r12_fiq,
r13_fiq, /* FIQ mode SP and LR */
r14_fiq,
r13_irq, /* IRQ mode SP and LR */
r14_irq,
r13_svc, /* SVC mode SP and LR */
r14_svc,
r13_undef, /* UNDEF mode SP and LR */
r14_undef,
r13_abt, /* ABT mode SP and LR */
r14_abt
};
} // namespace ArmISA } // namespace ArmISA
#endif #endif