Clean up a few spots where we weren't handling of misspeculation correctly.
arch/alpha/ev5.cc: Don't call kernelStats.hwrei() or system->breakpoint() on misspeculated paths. arch/alpha/isa_desc: Don't write reegs.intrflag, do Annotate::Callpal, or call xc->syscall on misspeculated paths. --HG-- extra : convert_revision : e73b96fbe4ac5be85fb20aa218fd05fd56d5b2f3
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cec7f73abf
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1820520697
2 changed files with 17 additions and 8 deletions
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@ -168,11 +168,11 @@ ExecContext::hwrei()
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if (!PC_PAL(regs.pc))
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if (!PC_PAL(regs.pc))
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return Unimplemented_Opcode_Fault;
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return Unimplemented_Opcode_Fault;
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kernelStats.hwrei();
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setNextPC(ipr[AlphaISA::IPR_EXC_ADDR]);
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regs.npc = ipr[AlphaISA::IPR_EXC_ADDR];
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if (!misspeculating()) {
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if (!misspeculating()) {
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kernelStats.hwrei();
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if ((ipr[AlphaISA::IPR_EXC_ADDR] & 1) == 0)
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if ((ipr[AlphaISA::IPR_EXC_ADDR] & 1) == 0)
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AlphaISA::swap_palshadow(®s, false);
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AlphaISA::swap_palshadow(®s, false);
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@ -560,7 +560,7 @@ ExecContext::simPalCheck(int palFunc)
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case PAL::bpt:
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case PAL::bpt:
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case PAL::bugchk:
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case PAL::bugchk:
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if (system->breakpoint())
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if (!misspeculating() && system->breakpoint())
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return false;
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return false;
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break;
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break;
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}
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}
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@ -2322,11 +2322,15 @@ decode OPCODE default Unknown::unknown() {
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format BasicOperate {
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format BasicOperate {
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0xe000: rc({{
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0xe000: rc({{
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Ra = xc->regs.intrflag;
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Ra = xc->regs.intrflag;
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xc->regs.intrflag = 0;
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if (!xc->misspeculating()) {
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xc->regs.intrflag = 0;
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}
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}}, No_OpClass);
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}}, No_OpClass);
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0xf000: rs({{
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0xf000: rs({{
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Ra = xc->regs.intrflag;
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Ra = xc->regs.intrflag;
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xc->regs.intrflag = 1;
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if (!xc->misspeculating()) {
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xc->regs.intrflag = 1;
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}
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}}, No_OpClass);
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}}, No_OpClass);
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}
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}
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#else
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#else
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@ -2343,7 +2347,9 @@ decode OPCODE default Unknown::unknown() {
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// on this PAL call (including maybe suppress it)
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// on this PAL call (including maybe suppress it)
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bool dopal = xc->simPalCheck(palFunc);
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bool dopal = xc->simPalCheck(palFunc);
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Annotate::Callpal(xc, palFunc);
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if (!xc->misspeculating()) {
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Annotate::Callpal(xc, palFunc);
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}
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if (dopal) {
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if (dopal) {
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if (!xc->misspeculating()) {
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if (!xc->misspeculating()) {
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@ -2360,7 +2366,10 @@ decode OPCODE default Unknown::unknown() {
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if (!xc->misspeculating())
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if (!xc->misspeculating())
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SimExit("halt instruction encountered");
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SimExit("halt instruction encountered");
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}});
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}});
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0x83: callsys({{ xc->syscall(); }});
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0x83: callsys({{
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if (!xc->misspeculating())
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xc->syscall();
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}});
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// Read uniq reg into ABI return value register (r0)
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// Read uniq reg into ABI return value register (r0)
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0x9e: rduniq({{ R0 = Runiq; }});
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0x9e: rduniq({{ R0 = Runiq; }});
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// Write uniq reg with value from ABI arg register (r16)
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// Write uniq reg with value from ABI arg register (r16)
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