ARM: Get rid of some bitfields that aren't used. A few may need to be readded.
This commit is contained in:
Gabe Black
parent
7172e26cc4
commit
148c265cf3
2 changed files with 9 additions and 155 deletions
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@ -36,30 +36,17 @@
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// Opcode fields
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// Opcode fields
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def bitfield ENCODING encoding;
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def bitfield ENCODING encoding;
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def bitfield OPCODE opcode;
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def bitfield OPCODE opcode;
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def bitfield OPCODE_24_23 opcode24_23;
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def bitfield MEDIA_OPCODE mediaOpcode;
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def bitfield MEDIA_OPCODE mediaOpcode;
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def bitfield MEDIA_OPCODE2 mediaOpcode2;
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def bitfield MEDIA_OPCODE2 mediaOpcode2;
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def bitfield OPCODE_24 opcode24;
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def bitfield OPCODE_24 opcode24;
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def bitfield OPCODE_23_20 opcode23_20;
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def bitfield OPCODE_23_20 opcode23_20;
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def bitfield OPCODE_23_21 opcode23_21;
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def bitfield OPCODE_23_21 opcode23_21;
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def bitfield OPCODE_23 opcode23;
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def bitfield OPCODE_22_8 opcode22_8;
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def bitfield OPCODE_22_21 opcode22_21;
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def bitfield OPCODE_22 opcode22;
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def bitfield OPCODE_22 opcode22;
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def bitfield OPCODE_21_20 opcode21_20;
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def bitfield OPCODE_20 opcode20;
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def bitfield OPCODE_19_18 opcode19_18;
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def bitfield OPCODE_19 opcode19;
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def bitfield OPCODE_19 opcode19;
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def bitfield OPCODE_15_12 opcode15_12;
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def bitfield OPCODE_15_12 opcode15_12;
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def bitfield OPCODE_15 opcode15;
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def bitfield OPCODE_15 opcode15;
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def bitfield OPCODE_9 opcode9;
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def bitfield MISC_OPCODE miscOpcode;
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def bitfield MISC_OPCODE miscOpcode;
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def bitfield OPCODE_7_5 opcode7_5;
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def bitfield OPCODE_7_6 opcode7_6;
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def bitfield OPCODE_7 opcode7;
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def bitfield OPCODE_7 opcode7;
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def bitfield OPCODE_6_5 opcode6_5;
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def bitfield OPCODE_6 opcode6;
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def bitfield OPCODE_5 opcode5;
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def bitfield OPCODE_4 opcode4;
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def bitfield OPCODE_4 opcode4;
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def bitfield IS_MISC isMisc;
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def bitfield IS_MISC isMisc;
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@ -76,14 +63,6 @@ def bitfield RM rm;
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def bitfield RS rs;
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def bitfield RS rs;
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def bitfield RDUP rdup;
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def bitfield RNDN rddn;
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def bitfield RDHI rdhi;
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def bitfield RDLO rdlo;
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def bitfield U_FIELD uField;
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def bitfield PUSWL puswl;
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def bitfield PUSWL puswl;
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def bitfield PREPOST puswl.prepost;
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def bitfield PREPOST puswl.prepost;
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def bitfield UP puswl.up;
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def bitfield UP puswl.up;
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@ -92,69 +71,15 @@ def bitfield WRITEBACK puswl.writeback;
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def bitfield LOADOP puswl.loadOp;
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def bitfield LOADOP puswl.loadOp;
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def bitfield PUBWL pubwl;
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def bitfield PUBWL pubwl;
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def bitfield PUIWL puiwl;
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def bitfield BYTEACCESS byteAccess;
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def bitfield LUAS luas;
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def bitfield IMM imm;
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def bitfield IMM imm;
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def bitfield IMMED_7_4 immed7_4;
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def bitfield IMMED_3_0 immed3_0;
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def bitfield F_MSR msr.f;
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def bitfield S_MSR msr.s;
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def bitfield X_MSR msr.x;
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def bitfield C_MSR msr.c;
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def bitfield Y_6 y;
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def bitfield X_5 x;
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def bitfield IMMED_15_4 immed15_4;
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def bitfield W_FIELD wField;
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def bitfield ROTATE rotate;
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def bitfield IMMED_7_0 immed7_0;
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def bitfield T_FIELD tField;
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def bitfield IMMED_11_0 immed11_0;
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def bitfield IMMED_11_0 immed11_0;
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def bitfield IMMED_20_16 immed20_16;
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def bitfield IMMED_19_16 immed19_16;
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def bitfield IMMED_HI_11_8 immedHi11_8;
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def bitfield IMMED_HI_11_8 immedHi11_8;
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def bitfield IMMED_LO_3_0 immedLo3_0;
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def bitfield IMMED_LO_3_0 immedLo3_0;
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def bitfield ROT rot;
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def bitfield R_FIELD rField;
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def bitfield CARET caret;
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def bitfield REGLIST regList;
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def bitfield OFFSET offset;
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def bitfield COPRO copro;
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def bitfield OP1_7_4 op1_7_4;
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def bitfield CM cm;
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def bitfield L_FIELD lField;
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def bitfield CD cd;
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def bitfield OPTION option;
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def bitfield OP1_23_20 op1_23_20;
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def bitfield CN cn;
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def bitfield OP2_7_5 op2_7_5;
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def bitfield OP1_23_21 op1_23_21;
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def bitfield IMMED_23_0 immed23_0;
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def bitfield IMMED_23_0 immed23_0;
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def bitfield M_FIELD mField;
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def bitfield A_FIELD aField;
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def bitfield I_FIELD iField;
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def bitfield F_FIELD fField;
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def bitfield MODE mode;
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def bitfield A_BLX aBlx;
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def bitfield CPNUM cpNum;
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def bitfield CPNUM cpNum;
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// Note that FP Regs are only 3 bits
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// Note that FP Regs are only 3 bits
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@ -47,28 +47,15 @@ namespace ArmISA
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Bitfield<27, 25> encoding;
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Bitfield<27, 25> encoding;
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Bitfield<24, 21> opcode;
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Bitfield<24, 21> opcode;
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Bitfield<24, 20> mediaOpcode;
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Bitfield<24, 20> mediaOpcode;
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Bitfield<24, 23> opcode24_23;
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Bitfield<24> opcode24;
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Bitfield<24> opcode24;
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Bitfield<23, 20> opcode23_20;
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Bitfield<23, 20> opcode23_20;
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Bitfield<23, 21> opcode23_21;
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Bitfield<23, 21> opcode23_21;
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Bitfield<23> opcode23;
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Bitfield<22, 8> opcode22_8;
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Bitfield<22, 21> opcode22_21;
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Bitfield<22> opcode22;
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Bitfield<22> opcode22;
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Bitfield<21, 20> opcode21_20;
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Bitfield<20> opcode20;
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Bitfield<19, 18> opcode19_18;
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Bitfield<19> opcode19;
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Bitfield<19> opcode19;
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Bitfield<15, 12> opcode15_12;
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Bitfield<15, 12> opcode15_12;
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Bitfield<15> opcode15;
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Bitfield<15> opcode15;
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Bitfield<9> opcode9;
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Bitfield<7, 4> miscOpcode;
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Bitfield<7, 4> miscOpcode;
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Bitfield<7, 5> opcode7_5;
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Bitfield<7, 6> opcode7_6;
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Bitfield<7> opcode7;
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Bitfield<7> opcode7;
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Bitfield<6, 5> opcode6_5;
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Bitfield<6> opcode6;
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Bitfield<5> opcode5;
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Bitfield<4> opcode4;
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Bitfield<4> opcode4;
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Bitfield<31, 28> condCode;
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Bitfield<31, 28> condCode;
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@ -81,14 +68,6 @@ namespace ArmISA
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Bitfield<11, 8> rs;
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Bitfield<11, 8> rs;
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Bitfield<19, 16> rdup;
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Bitfield<15, 12> rddn;
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Bitfield<15, 12> rdhi;
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Bitfield<11, 8> rdlo;
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Bitfield<23> uField;
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SubBitUnion(puswl, 24, 20)
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SubBitUnion(puswl, 24, 20)
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Bitfield<24> prepost;
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Bitfield<24> prepost;
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Bitfield<23> up;
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Bitfield<23> up;
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@ -98,72 +77,22 @@ namespace ArmISA
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EndSubBitUnion(puswl)
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EndSubBitUnion(puswl)
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Bitfield<24, 20> pubwl;
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Bitfield<24, 20> pubwl;
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Bitfield<24, 20> puiwl;
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Bitfield<22> byteAccess;
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Bitfield<23, 20> luas;
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Bitfield<7, 0> imm;
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SubBitUnion(imm, 7, 0)
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Bitfield<7, 4> imm7_4;
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Bitfield<3, 0> imm3_0;
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EndSubBitUnion(imm)
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SubBitUnion(msr, 19, 16)
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Bitfield<19> f;
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Bitfield<18> s;
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Bitfield<17> x;
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Bitfield<16> c;
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EndSubBitUnion(msr)
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Bitfield<6> y;
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Bitfield<5> x;
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Bitfield<15, 4> immed15_4;
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Bitfield<21> wField;
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Bitfield<11, 8> rotate;
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Bitfield<11, 8> rotate;
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Bitfield<7, 0> immed7_0;
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Bitfield<21> tField;
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Bitfield<11, 0> immed11_0;
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Bitfield<11, 0> immed11_0;
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Bitfield<7, 0> immed7_0;
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Bitfield<20, 16> immed20_16;
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Bitfield<19, 16> immed19_16;
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Bitfield<11, 8> immedHi11_8;
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Bitfield<11, 8> immedHi11_8;
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Bitfield<3, 0> immedLo3_0;
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Bitfield<3, 0> immedLo3_0;
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Bitfield<11, 10> rot;
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Bitfield<5> rField;
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Bitfield<22> caret;
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Bitfield<15, 0> regList;
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Bitfield<15, 0> regList;
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Bitfield<23, 0> offset;
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Bitfield<23, 0> offset;
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Bitfield<11, 8> copro;
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Bitfield<7, 4> op1_7_4;
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Bitfield<3, 0> cm;
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Bitfield<22> lField;
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Bitfield<15, 12> cd;
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Bitfield<7, 0> option;
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Bitfield<23, 20> op1_23_20;
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Bitfield<19, 16> cn;
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Bitfield<7, 5> op2_7_5;
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Bitfield<23, 21> op1_23_21;
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Bitfield<23, 0> immed23_0;
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Bitfield<23, 0> immed23_0;
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Bitfield<17> mField;
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Bitfield<8> aField;
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Bitfield<7> iField;
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Bitfield<6> fField;
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Bitfield<4, 0> mode;
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Bitfield<24> aBlx;
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Bitfield<11, 8> cpNum;
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Bitfield<11, 8> cpNum;
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Bitfield<18, 16> fn;
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Bitfield<18, 16> fn;
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