Mem: add per-master stats to physmem
Added per-master stats (similar to cache stats) to physmem.
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eced845a5e
commit
14539ccae1
3 changed files with 90 additions and 13 deletions
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@ -60,12 +60,14 @@
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#include "debug/MemoryAccess.hh"
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#include "mem/abstract_mem.hh"
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#include "mem/packet_access.hh"
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#include "sim/system.hh"
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using namespace std;
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AbstractMemory::AbstractMemory(const Params *p) :
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MemObject(p), range(params()->range), pmemAddr(NULL),
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confTableReported(p->conf_table_reported), inAddrMap(p->in_addr_map)
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confTableReported(p->conf_table_reported), inAddrMap(p->in_addr_map),
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_system(NULL)
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{
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if (size() % TheISA::PageBytes != 0)
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panic("Memory Size not divisible by page size\n");
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@ -116,54 +118,103 @@ AbstractMemory::regStats()
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{
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using namespace Stats;
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assert(system());
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bytesRead
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.init(system()->maxMasters())
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.name(name() + ".bytes_read")
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.desc("Number of bytes read from this memory")
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.flags(total | nozero | nonan)
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;
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for (int i = 0; i < system()->maxMasters(); i++) {
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bytesRead.subname(i, system()->getMasterName(i));
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}
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bytesInstRead
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.init(system()->maxMasters())
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.name(name() + ".bytes_inst_read")
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.desc("Number of instructions bytes read from this memory")
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.flags(total | nozero | nonan)
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;
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for (int i = 0; i < system()->maxMasters(); i++) {
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bytesInstRead.subname(i, system()->getMasterName(i));
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}
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bytesWritten
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.init(system()->maxMasters())
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.name(name() + ".bytes_written")
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.desc("Number of bytes written to this memory")
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.flags(total | nozero | nonan)
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;
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for (int i = 0; i < system()->maxMasters(); i++) {
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bytesWritten.subname(i, system()->getMasterName(i));
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}
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numReads
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.init(system()->maxMasters())
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.name(name() + ".num_reads")
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.desc("Number of read requests responded to by this memory")
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.flags(total | nozero | nonan)
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;
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for (int i = 0; i < system()->maxMasters(); i++) {
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numReads.subname(i, system()->getMasterName(i));
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}
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numWrites
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.init(system()->maxMasters())
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.name(name() + ".num_writes")
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.desc("Number of write requests responded to by this memory")
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.flags(total | nozero | nonan)
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;
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for (int i = 0; i < system()->maxMasters(); i++) {
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numWrites.subname(i, system()->getMasterName(i));
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}
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numOther
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.init(system()->maxMasters())
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.name(name() + ".num_other")
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.desc("Number of other requests responded to by this memory")
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.flags(total | nozero | nonan)
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;
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for (int i = 0; i < system()->maxMasters(); i++) {
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numOther.subname(i, system()->getMasterName(i));
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}
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bwRead
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.name(name() + ".bw_read")
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.desc("Total read bandwidth from this memory (bytes/s)")
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.precision(0)
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.prereq(bytesRead)
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.flags(total | nozero | nonan)
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;
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for (int i = 0; i < system()->maxMasters(); i++) {
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bwRead.subname(i, system()->getMasterName(i));
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}
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bwInstRead
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.name(name() + ".bw_inst_read")
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.desc("Instruction read bandwidth from this memory (bytes/s)")
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.precision(0)
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.prereq(bytesInstRead)
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.flags(total | nozero | nonan)
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;
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for (int i = 0; i < system()->maxMasters(); i++) {
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bwInstRead.subname(i, system()->getMasterName(i));
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}
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bwWrite
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.name(name() + ".bw_write")
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.desc("Write bandwidth from this memory (bytes/s)")
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.precision(0)
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.prereq(bytesWritten)
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.flags(total | nozero | nonan)
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;
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for (int i = 0; i < system()->maxMasters(); i++) {
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bwWrite.subname(i, system()->getMasterName(i));
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}
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bwTotal
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.name(name() + ".bw_total")
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.desc("Total bandwidth to/from this memory (bytes/s)")
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.precision(0)
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.prereq(bwTotal)
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.flags(total | nozero | nonan)
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;
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for (int i = 0; i < system()->maxMasters(); i++) {
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bwTotal.subname(i, system()->getMasterName(i));
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}
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bwRead = bytesRead / simSeconds;
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bwInstRead = bytesInstRead / simSeconds;
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bwWrite = bytesWritten / simSeconds;
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@ -336,7 +387,7 @@ AbstractMemory::access(PacketPtr pkt)
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assert(!pkt->req->isInstFetch());
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TRACE_PACKET("Read/Write");
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numOther++;
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numOther[pkt->req->masterId()]++;
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} else if (pkt->isRead()) {
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assert(!pkt->isWrite());
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if (pkt->isLLSC()) {
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@ -345,18 +396,18 @@ AbstractMemory::access(PacketPtr pkt)
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if (pmemAddr)
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memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
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TRACE_PACKET(pkt->req->isInstFetch() ? "IFetch" : "Read");
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numReads++;
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bytesRead += pkt->getSize();
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numReads[pkt->req->masterId()]++;
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bytesRead[pkt->req->masterId()] += pkt->getSize();
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if (pkt->req->isInstFetch())
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bytesInstRead += pkt->getSize();
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bytesInstRead[pkt->req->masterId()] += pkt->getSize();
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} else if (pkt->isWrite()) {
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if (writeOK(pkt)) {
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if (pmemAddr)
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memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
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assert(!pkt->req->isInstFetch());
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TRACE_PACKET("Write");
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numWrites++;
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bytesWritten += pkt->getSize();
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numWrites[pkt->req->masterId()]++;
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bytesWritten[pkt->req->masterId()] += pkt->getSize();
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}
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} else if (pkt->isInvalidate()) {
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// no need to do anything
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@ -53,6 +53,9 @@
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#include "params/AbstractMemory.hh"
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#include "sim/stats.hh"
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class System;
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/**
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* An abstract memory represents a contiguous block of physical
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* memory, with an associated address range, and also provides basic
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@ -140,17 +143,17 @@ class AbstractMemory : public MemObject
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}
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/** Number of total bytes read from this memory */
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Stats::Scalar bytesRead;
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Stats::Vector bytesRead;
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/** Number of instruction bytes read from this memory */
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Stats::Scalar bytesInstRead;
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Stats::Vector bytesInstRead;
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/** Number of bytes written to this memory */
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Stats::Scalar bytesWritten;
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Stats::Vector bytesWritten;
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/** Number of read requests */
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Stats::Scalar numReads;
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Stats::Vector numReads;
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/** Number of write requests */
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Stats::Scalar numWrites;
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Stats::Vector numWrites;
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/** Number of other requests */
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Stats::Scalar numOther;
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Stats::Vector numOther;
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/** Read bandwidth from this memory */
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Stats::Formula bwRead;
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/** Read bandwidth from this memory */
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@ -160,6 +163,13 @@ class AbstractMemory : public MemObject
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/** Total bandwidth from this memory */
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Stats::Formula bwTotal;
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/** Pointor to the System object.
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* This is used for getting the number of masters in the system which is
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* needed when registering stats
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*/
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System *_system;
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private:
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// Prevent copying
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@ -175,6 +185,19 @@ class AbstractMemory : public MemObject
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AbstractMemory(const Params* p);
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virtual ~AbstractMemory();
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/** read the system pointer
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* Implemented for completeness with the setter
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* @return pointer to the system object */
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System* system() const { return _system; }
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/** Set the system pointer on this memory
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* This can't be done via a python parameter because the system needs
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* pointers to all the memories and the reverse would create a cycle in the
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* object graph. An init() this is set.
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* @param sys system pointer to set
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*/
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void system(System *sys) { _system = sys; }
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const Params *
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params() const
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{
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@ -145,6 +145,9 @@ System::System(Params *p)
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// increment the number of running systms
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numSystemsRunning++;
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// Set back pointers to the system in all memories
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for (int x = 0; x < params()->memories.size(); x++)
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params()->memories[x]->system(this);
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}
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System::~System()
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