Mem: add per-master stats to physmem

Added per-master stats (similar to cache stats) to physmem.

src/mem/abstract_mem.cc

@@ -60,12 +60,14 @@
 #include "debug/MemoryAccess.hh"
 #include "mem/abstract_mem.hh"
 #include "mem/packet_access.hh"
+#include "sim/system.hh"
 
 using namespace std;
 
 AbstractMemory::AbstractMemory(const Params *p) :
     MemObject(p), range(params()->range), pmemAddr(NULL),
-    confTableReported(p->conf_table_reported), inAddrMap(p->in_addr_map)
+    confTableReported(p->conf_table_reported), inAddrMap(p->in_addr_map),
+    _system(NULL)
 {
     if (size() % TheISA::PageBytes != 0)
         panic("Memory Size not divisible by page size\n");
@@ -116,54 +118,103 @@ AbstractMemory::regStats()
 {
     using namespace Stats;
 
+    assert(system());
+
     bytesRead
+        .init(system()->maxMasters())
         .name(name() + ".bytes_read")
         .desc("Number of bytes read from this memory")
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bytesRead.subname(i, system()->getMasterName(i));
+    }
     bytesInstRead
+        .init(system()->maxMasters())
         .name(name() + ".bytes_inst_read")
         .desc("Number of instructions bytes read from this memory")
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bytesInstRead.subname(i, system()->getMasterName(i));
+    }
     bytesWritten
+        .init(system()->maxMasters())
         .name(name() + ".bytes_written")
         .desc("Number of bytes written to this memory")
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bytesWritten.subname(i, system()->getMasterName(i));
+    }
     numReads
+        .init(system()->maxMasters())
         .name(name() + ".num_reads")
         .desc("Number of read requests responded to by this memory")
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        numReads.subname(i, system()->getMasterName(i));
+    }
     numWrites
+        .init(system()->maxMasters())
         .name(name() + ".num_writes")
         .desc("Number of write requests responded to by this memory")
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        numWrites.subname(i, system()->getMasterName(i));
+    }
     numOther
+        .init(system()->maxMasters())
         .name(name() + ".num_other")
         .desc("Number of other requests responded to by this memory")
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        numOther.subname(i, system()->getMasterName(i));
+    }
     bwRead
         .name(name() + ".bw_read")
         .desc("Total read bandwidth from this memory (bytes/s)")
         .precision(0)
         .prereq(bytesRead)
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bwRead.subname(i, system()->getMasterName(i));
+    }
+
     bwInstRead
         .name(name() + ".bw_inst_read")
         .desc("Instruction read bandwidth from this memory (bytes/s)")
         .precision(0)
         .prereq(bytesInstRead)
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bwInstRead.subname(i, system()->getMasterName(i));
+    }
     bwWrite
         .name(name() + ".bw_write")
         .desc("Write bandwidth from this memory (bytes/s)")
         .precision(0)
         .prereq(bytesWritten)
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bwWrite.subname(i, system()->getMasterName(i));
+    }
     bwTotal
         .name(name() + ".bw_total")
         .desc("Total bandwidth to/from this memory (bytes/s)")
         .precision(0)
         .prereq(bwTotal)
+        .flags(total | nozero | nonan)
         ;
+    for (int i = 0; i < system()->maxMasters(); i++) {
+        bwTotal.subname(i, system()->getMasterName(i));
+    }
     bwRead = bytesRead / simSeconds;
     bwInstRead = bytesInstRead / simSeconds;
     bwWrite = bytesWritten / simSeconds;
@@ -336,7 +387,7 @@ AbstractMemory::access(PacketPtr pkt)
 
         assert(!pkt->req->isInstFetch());
         TRACE_PACKET("Read/Write");
-        numOther++;
+        numOther[pkt->req->masterId()]++;
     } else if (pkt->isRead()) {
         assert(!pkt->isWrite());
         if (pkt->isLLSC()) {
@@ -345,18 +396,18 @@ AbstractMemory::access(PacketPtr pkt)
         if (pmemAddr)
             memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
         TRACE_PACKET(pkt->req->isInstFetch() ? "IFetch" : "Read");
-        numReads++;
+        numReads[pkt->req->masterId()]++;
-        bytesRead += pkt->getSize();
+        bytesRead[pkt->req->masterId()] += pkt->getSize();
         if (pkt->req->isInstFetch())
-            bytesInstRead += pkt->getSize();
+            bytesInstRead[pkt->req->masterId()] += pkt->getSize();
     } else if (pkt->isWrite()) {
         if (writeOK(pkt)) {
             if (pmemAddr)
                 memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
             assert(!pkt->req->isInstFetch());
             TRACE_PACKET("Write");
-            numWrites++;
+            numWrites[pkt->req->masterId()]++;
-            bytesWritten += pkt->getSize();
+            bytesWritten[pkt->req->masterId()] += pkt->getSize();
         }
     } else if (pkt->isInvalidate()) {
         // no need to do anything

src/mem/abstract_mem.hh

@@ -53,6 +53,9 @@
 #include "params/AbstractMemory.hh"
 #include "sim/stats.hh"
 
+
+class System;
+
 /**
  * An abstract memory represents a contiguous block of physical
  * memory, with an associated address range, and also provides basic
@@ -140,17 +143,17 @@ class AbstractMemory : public MemObject
     }
 
     /** Number of total bytes read from this memory */
-    Stats::Scalar bytesRead;
+    Stats::Vector bytesRead;
     /** Number of instruction bytes read from this memory */
-    Stats::Scalar bytesInstRead;
+    Stats::Vector bytesInstRead;
     /** Number of bytes written to this memory */
-    Stats::Scalar bytesWritten;
+    Stats::Vector bytesWritten;
     /** Number of read requests */
-    Stats::Scalar numReads;
+    Stats::Vector numReads;
     /** Number of write requests */
-    Stats::Scalar numWrites;
+    Stats::Vector numWrites;
     /** Number of other requests */
-    Stats::Scalar numOther;
+    Stats::Vector numOther;
     /** Read bandwidth from this memory */
     Stats::Formula bwRead;
     /** Read bandwidth from this memory */
@@ -160,6 +163,13 @@ class AbstractMemory : public MemObject
     /** Total bandwidth from this memory */
     Stats::Formula bwTotal;
 
+    /** Pointor to the System object.
+     * This is used for getting the number of masters in the system which is
+     * needed when registering stats
+     */
+    System *_system;
+
+
   private:
 
     // Prevent copying
@@ -175,6 +185,19 @@ class AbstractMemory : public MemObject
     AbstractMemory(const Params* p);
     virtual ~AbstractMemory();
 
+    /** read the system pointer
+     * Implemented for completeness with the setter
+     * @return pointer to the system object */
+    System* system() const { return _system; }
+
+    /** Set the system pointer on this memory
+     * This can't be done via a python parameter because the system needs
+     * pointers to all the memories and the reverse would create a cycle in the
+     * object graph. An init() this is set.
+     * @param sys system pointer to set
+     */
+    void system(System *sys) { _system = sys; }
+
     const Params *
     params() const
     {

src/sim/system.cc

@@ -145,6 +145,9 @@ System::System(Params *p)
     // increment the number of running systms
     numSystemsRunning++;
 
+    // Set back pointers to the system in all memories
+    for (int x = 0; x < params()->memories.size(); x++)
+        params()->memories[x]->system(this);
 }
 
 System::~System()