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regressions: stats update due to stats from ruby prefetcher

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This commit is contained in:
Nilay Vaish 2012-12-11 10:06:01 -06:00
parent f3d0be210f
commit 141ee38794
15 changed files with 708 additions and 110 deletions
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28
tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini
View file

@ -629,15 +629,17 @@ sys=system
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
buffer_size=0
cntrl_id=0
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl0.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -674,6 +676,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl0.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=true
@ -694,15 +706,17 @@ slave=system.cpu0.icache_port system.cpu0.dcache_port system.cpu0.itb.walker.por
[system.l1_cntrl1]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl1.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl1.L1IcacheMemory
buffer_size=0
cntrl_id=1
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl1.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -739,6 +753,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl1.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl1.sequencer]
type=RubySequencer
access_phys_mem=true

99
tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/ruby.stats
View file

@ -1,24 +1,24 @@
Real time: Oct/27/2012 15:45:09
Real time: Dec/11/2012 06:57:21
Profiler Stats
--------------
Elapsed_time_in_seconds: 671
Elapsed_time_in_minutes: 11.1833
Elapsed_time_in_hours: 0.186389
Elapsed_time_in_days: 0.0077662
Elapsed_time_in_seconds: 720
Elapsed_time_in_minutes: 12
Elapsed_time_in_hours: 0.2
Elapsed_time_in_days: 0.00833333
Virtual_time_in_seconds: 665.95
Virtual_time_in_minutes: 11.0992
Virtual_time_in_hours: 0.184986
Virtual_time_in_days: 0.00770775
Virtual_time_in_seconds: 718.24
Virtual_time_in_minutes: 11.9707
Virtual_time_in_hours: 0.199511
Virtual_time_in_days: 0.00831296
Ruby_current_time: 10410012988
Ruby_start_time: 0
Ruby_cycles: 10410012988
mbytes_resident: 259.211
mbytes_total: 493.871
resident_ratio: 0.524863
mbytes_resident: 260.055
mbytes_total: 495.168
resident_ratio: 0.525201
ruby_cycles_executed: [ 10410012989 10410012989 ]
@ -87,13 +87,13 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 9 count: 4899179 average: 0.0429682 |
Resource Usage
--------------
page_size: 4096
user_time: 665
user_time: 718
system_time: 0
page_reclaims: 56440
page_faults: 21
page_reclaims: 57537
page_faults: 25
swaps: 0
block_inputs: 30000
block_outputs: 536
block_inputs: 16336
block_outputs: 512
Network Stats
-------------
@ -235,6 +235,9 @@ Data_all_Acks [854313 427607 ] 1281920
Ack [20626 22980 ] 43606
Ack_all [22417 23930 ] 46347
WB_Ack [1509156 186097 ] 1695253
PF_Load [0 0 ] 0
PF_Ifetch [0 0 ] 0
PF_Store [0 0 ] 0
- Transitions -
NP Load [1283896 113817 ] 1397713
@ -242,18 +245,26 @@ NP Ifetch [500075 286188 ] 786263
NP Store [296389 110024 ] 406413
NP Inv [6714 2646 ] 9360
NP L1_Replacement [0 0 ] 0
NP PF_Load [0 0 ] 0
NP PF_Ifetch [0 0 ] 0
NP PF_Store [0 0 ] 0
I Load [16574 16247 ] 32821
I Ifetch [383 392 ] 775
I Store [7661 9474 ] 17135
I Inv [0 0 ] 0
I L1_Replacement [14969 11940 ] 26909
I PF_Load [0 0 ] 0
I PF_Ifetch [0 0 ] 0
I PF_Store [0 0 ] 0
S Load [793915 479736 ] 1273651
S Ifetch [108316996 19344327 ] 127661323
S Store [20626 22981 ] 43607
S Inv [23501 22199 ] 45700
S L1_Replacement [555211 310968 ] 866179
S PF_Load [0 0 ] 0
S PF_Store [0 0 ] 0
E Load [3115881 532241 ] 3648122
E Ifetch [0 0 ] 0
@ -263,6 +274,8 @@ E L1_Replacement [1105264 51360 ] 1156624
E Fwd_GETX [95 109 ] 204
E Fwd_GETS [1520 1047 ] 2567
E Fwd_GET_INSTR [1 0 ] 1
E PF_Load [0 0 ] 0
E PF_Store [0 0 ] 0
M Load [6446882 2553818 ] 9000700
M Ifetch [0 0 ] 0
@ -272,6 +285,8 @@ M L1_Replacement [403892 134737 ] 538629
M Fwd_GETX [15889 15493 ] 31382
M Fwd_GETS [22982 22269 ] 45251
M Fwd_GET_INSTR [4 0 ] 4
M PF_Load [0 0 ] 0
M PF_Store [0 0 ] 0
IS Load [0 0 ] 0
IS Ifetch [0 0 ] 0
@ -281,6 +296,8 @@ IS L1_Replacement [0 0 ] 0
IS Data_Exclusive [1225558 83079 ] 1308637
IS DataS_fromL1 [23316 24507 ] 47823
IS Data_all_Acks [552054 309058 ] 861112
IS PF_Load [0 0 ] 0
IS PF_Store [0 0 ] 0
IM Load [0 0 ] 0
IM Ifetch [0 0 ] 0
@ -290,6 +307,8 @@ IM L1_Replacement [0 0 ] 0
IM Data [1791 950 ] 2741
IM Data_all_Acks [302259 118549 ] 420808
IM Ack [0 0 ] 0
IM PF_Load [0 0 ] 0
IM PF_Store [0 0 ] 0
SM Load [0 0 ] 0
SM Ifetch [0 0 ] 0
@ -298,6 +317,8 @@ SM Inv [0 1 ] 1
SM L1_Replacement [0 0 ] 0
SM Ack [20626 22980 ] 43606
SM Ack_all [22417 23930 ] 46347
SM PF_Load [0 0 ] 0
SM PF_Store [0 0 ] 0
IS_I Load [0 0 ] 0
IS_I Ifetch [0 0 ] 0
@ -307,6 +328,8 @@ IS_I L1_Replacement [0 0 ] 0
IS_I Data_Exclusive [0 0 ] 0
IS_I DataS_fromL1 [0 0 ] 0
IS_I Data_all_Acks [0 0 ] 0
IS_I PF_Load [0 0 ] 0
IS_I PF_Store [0 0 ] 0
M_I Load [0 0 ] 0
M_I Ifetch [5 1 ] 6
@ -317,6 +340,8 @@ M_I Fwd_GETX [0 0 ] 0
M_I Fwd_GETS [0 0 ] 0
M_I Fwd_GET_INSTR [0 0 ] 0
M_I WB_Ack [1509156 186097 ] 1695253
M_I PF_Load [0 0 ] 0
M_I PF_Store [0 0 ] 0
SINK_WB_ACK Load [0 0 ] 0
SINK_WB_ACK Ifetch [0 0 ] 0
@ -324,6 +349,46 @@ SINK_WB_ACK Store [0 0 ] 0
SINK_WB_ACK Inv [0 0 ] 0
SINK_WB_ACK L1_Replacement [0 0 ] 0
SINK_WB_ACK WB_Ack [0 0 ] 0
SINK_WB_ACK PF_Load [0 0 ] 0
SINK_WB_ACK PF_Store [0 0 ] 0
PF_IS Load [0 0 ] 0
PF_IS Ifetch [0 0 ] 0
PF_IS Store [0 0 ] 0
PF_IS Inv [0 0 ] 0
PF_IS L1_Replacement [0 0 ] 0
PF_IS Data_Exclusive [0 0 ] 0
PF_IS DataS_fromL1 [0 0 ] 0
PF_IS Data_all_Acks [0 0 ] 0
PF_IS PF_Load [0 0 ] 0
PF_IS PF_Store [0 0 ] 0
PF_IM Load [0 0 ] 0
PF_IM Ifetch [0 0 ] 0
PF_IM Store [0 0 ] 0
PF_IM Inv [0 0 ] 0
PF_IM L1_Replacement [0 0 ] 0
PF_IM Data [0 0 ] 0
PF_IM Data_all_Acks [0 0 ] 0
PF_IM Ack [0 0 ] 0
PF_IM PF_Load [0 0 ] 0
PF_IM PF_Store [0 0 ] 0
PF_SM Load [0 0 ] 0
PF_SM Ifetch [0 0 ] 0
PF_SM Store [0 0 ] 0
PF_SM Inv [0 0 ] 0
PF_SM L1_Replacement [0 0 ] 0
PF_SM Ack [0 0 ] 0
PF_SM Ack_all [0 0 ] 0
PF_IS_I Load [0 0 ] 0
PF_IS_I Store [0 0 ] 0
PF_IS_I Inv [0 0 ] 0
PF_IS_I L1_Replacement [0 0 ] 0
PF_IS_I Data_Exclusive [0 0 ] 0
PF_IS_I DataS_fromL1 [0 0 ] 0
PF_IS_I Data_all_Acks [0 0 ] 0
Cache Stats: system.l1_cntrl1.L1IcacheMemory
system.l1_cntrl1.L1IcacheMemory_total_misses: 286580

28
tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 5.205006 # Nu
sim_ticks 5205006494000 # Number of ticks simulated
final_tick 5205006494000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
host_inst_rate 176611 # Simulator instruction rate (inst/s)
host_op_rate 338881 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 8497542071 # Simulator tick rate (ticks/s)
host_mem_usage 459536 # Number of bytes of host memory used
host_seconds 612.53 # Real time elapsed on the host
host_inst_rate 150447 # Simulator instruction rate (inst/s)
host_op_rate 288677 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 7238673236 # Simulator tick rate (ticks/s)
host_mem_usage 507056 # Number of bytes of host memory used
host_seconds 719.06 # Real time elapsed on the host
sim_insts 108179755 # Number of instructions simulated
sim_ops 207574747 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::pc.south_bridge.ide 35216 # Number of bytes read from this memory
@ -242,6 +242,15 @@ system.l1_cntrl0.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl0.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl0.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl0.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl0.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl0.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl0.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl0.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl0.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl0.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl0.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl0.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl1.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl1.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl1.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@ -254,6 +263,15 @@ system.l1_cntrl1.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl1.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl1.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl1.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl1.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl1.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl1.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl1.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl1.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl1.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl1.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl1.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl1.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l2_cntrl0.L2cacheMemory.num_data_array_reads 0 # number of data array reads
system.l2_cntrl0.L2cacheMemory.num_data_array_writes 0 # number of data array writes
system.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0 # number of tag array reads

18
tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini
View file

@ -107,7 +107,7 @@ version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
numa_high_bit=5
size=134217728
use_map=false
version=0
@ -136,15 +136,17 @@ version=0
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
buffer_size=0
cntrl_id=0
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl0.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -172,7 +174,7 @@ type=RubyCache
assoc=2
dataAccessLatency=1
dataArrayBanks=1
is_icache=false
is_icache=true
latency=3
replacement_policy=PSEUDO_LRU
resourceStalls=false
@ -181,6 +183,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl0.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=true

97
tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats
View file

@ -1,24 +1,24 @@
Real time: Sep/01/2012 14:02:52
Real time: Dec/11/2012 09:10:21
Profiler Stats
--------------
Elapsed_time_in_seconds: 0
Elapsed_time_in_minutes: 0
Elapsed_time_in_hours: 0
Elapsed_time_in_days: 0
Elapsed_time_in_seconds: 1
Elapsed_time_in_minutes: 0.0166667
Elapsed_time_in_hours: 0.000277778
Elapsed_time_in_days: 1.15741e-05
Virtual_time_in_seconds: 0.56
Virtual_time_in_minutes: 0.00933333
Virtual_time_in_hours: 0.000155556
Virtual_time_in_days: 6.48148e-06
Virtual_time_in_seconds: 0.61
Virtual_time_in_minutes: 0.0101667
Virtual_time_in_hours: 0.000169444
Virtual_time_in_days: 7.06019e-06
Ruby_current_time: 138616
Ruby_start_time: 0
Ruby_cycles: 138616
mbytes_resident: 49.5195
mbytes_total: 259.898
resident_ratio: 0.190594
mbytes_resident: 56.7109
mbytes_total: 269.371
resident_ratio: 0.210574
ruby_cycles_executed: [ 138617 ]
@ -83,11 +83,11 @@ Resource Usage
page_size: 4096
user_time: 0
system_time: 0
page_reclaims: 10172
page_faults: 15
page_reclaims: 11129
page_faults: 0
swaps: 0
block_inputs: 1112
block_outputs: 80
block_inputs: 0
block_outputs: 96
Network Stats
-------------
@ -201,6 +201,9 @@ Data_all_Acks [907 ] 907
Ack [0 ] 0
Ack_all [0 ] 0
WB_Ack [436 ] 436
PF_Load [0 ] 0
PF_Ifetch [0 ] 0
PF_Store [0 ] 0
- Transitions -
NP Load [525 ] 525
@ -208,18 +211,26 @@ NP Ifetch [646 ] 646
NP Store [191 ] 191
NP Inv [356 ] 356
NP L1_Replacement [0 ] 0
NP PF_Load [0 ] 0
NP PF_Ifetch [0 ] 0
NP PF_Store [0 ] 0
I Load [58 ] 58
I Ifetch [45 ] 45
I Store [25 ] 25
I Inv [0 ] 0
I L1_Replacement [556 ] 556
I PF_Load [0 ] 0
I PF_Ifetch [0 ] 0
I PF_Store [0 ] 0
S Load [0 ] 0
S Ifetch [5709 ] 5709
S Store [0 ] 0
S Inv [325 ] 325
S L1_Replacement [362 ] 362
S PF_Load [0 ] 0
S PF_Store [0 ] 0
E Load [452 ] 452
E Ifetch [0 ] 0
@ -229,6 +240,8 @@ E L1_Replacement [291 ] 291
E Fwd_GETX [0 ] 0
E Fwd_GETS [0 ] 0
E Fwd_GET_INSTR [0 ] 0
E PF_Load [0 ] 0
E PF_Store [0 ] 0
M Load [148 ] 148
M Ifetch [0 ] 0
@ -238,6 +251,8 @@ M L1_Replacement [145 ] 145
M Fwd_GETX [0 ] 0
M Fwd_GETS [0 ] 0
M Fwd_GET_INSTR [0 ] 0
M PF_Load [0 ] 0
M PF_Store [0 ] 0
IS Load [0 ] 0
IS Ifetch [0 ] 0
@ -247,6 +262,8 @@ IS L1_Replacement [0 ] 0
IS Data_Exclusive [583 ] 583
IS DataS_fromL1 [0 ] 0
IS Data_all_Acks [691 ] 691
IS PF_Load [0 ] 0
IS PF_Store [0 ] 0
IM Load [0 ] 0
IM Ifetch [0 ] 0
@ -256,6 +273,8 @@ IM L1_Replacement [0 ] 0
IM Data [0 ] 0
IM Data_all_Acks [216 ] 216
IM Ack [0 ] 0
IM PF_Load [0 ] 0
IM PF_Store [0 ] 0
SM Load [0 ] 0
SM Ifetch [0 ] 0
@ -264,6 +283,8 @@ SM Inv [0 ] 0
SM L1_Replacement [0 ] 0
SM Ack [0 ] 0
SM Ack_all [0 ] 0
SM PF_Load [0 ] 0
SM PF_Store [0 ] 0
IS_I Load [0 ] 0
IS_I Ifetch [0 ] 0
@ -273,6 +294,8 @@ IS_I L1_Replacement [0 ] 0
IS_I Data_Exclusive [0 ] 0
IS_I DataS_fromL1 [0 ] 0
IS_I Data_all_Acks [0 ] 0
IS_I PF_Load [0 ] 0
IS_I PF_Store [0 ] 0
M_I Load [0 ] 0
M_I Ifetch [0 ] 0
@ -283,6 +306,8 @@ M_I Fwd_GETX [0 ] 0
M_I Fwd_GETS [0 ] 0
M_I Fwd_GET_INSTR [0 ] 0
M_I WB_Ack [436 ] 436
M_I PF_Load [0 ] 0
M_I PF_Store [0 ] 0
SINK_WB_ACK Load [0 ] 0
SINK_WB_ACK Ifetch [0 ] 0
@ -290,6 +315,46 @@ SINK_WB_ACK Store [0 ] 0
SINK_WB_ACK Inv [0 ] 0
SINK_WB_ACK L1_Replacement [0 ] 0
SINK_WB_ACK WB_Ack [0 ] 0
SINK_WB_ACK PF_Load [0 ] 0
SINK_WB_ACK PF_Store [0 ] 0
PF_IS Load [0 ] 0
PF_IS Ifetch [0 ] 0
PF_IS Store [0 ] 0
PF_IS Inv [0 ] 0
PF_IS L1_Replacement [0 ] 0
PF_IS Data_Exclusive [0 ] 0
PF_IS DataS_fromL1 [0 ] 0
PF_IS Data_all_Acks [0 ] 0
PF_IS PF_Load [0 ] 0
PF_IS PF_Store [0 ] 0
PF_IM Load [0 ] 0
PF_IM Ifetch [0 ] 0
PF_IM Store [0 ] 0
PF_IM Inv [0 ] 0
PF_IM L1_Replacement [0 ] 0
PF_IM Data [0 ] 0
PF_IM Data_all_Acks [0 ] 0
PF_IM Ack [0 ] 0
PF_IM PF_Load [0 ] 0
PF_IM PF_Store [0 ] 0
PF_SM Load [0 ] 0
PF_SM Ifetch [0 ] 0
PF_SM Store [0 ] 0
PF_SM Inv [0 ] 0
PF_SM L1_Replacement [0 ] 0
PF_SM Ack [0 ] 0
PF_SM Ack_all [0 ] 0
PF_IS_I Load [0 ] 0
PF_IS_I Store [0 ] 0
PF_IS_I Inv [0 ] 0
PF_IS_I L1_Replacement [0 ] 0
PF_IS_I Data_Exclusive [0 ] 0
PF_IS_I DataS_fromL1 [0 ] 0
PF_IS_I Data_all_Acks [0 ] 0
Cache Stats: system.l2_cntrl0.L2cacheMemory
system.l2_cntrl0.L2cacheMemory_total_misses: 1460

19
tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.000139 # Nu
sim_ticks 138616 # Number of ticks simulated
final_tick 138616 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_inst_rate 27614 # Simulator instruction rate (inst/s)
host_op_rate 27611 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 598893 # Simulator tick rate (ticks/s)
host_mem_usage 266140 # Number of bytes of host memory used
host_seconds 0.23 # Real time elapsed on the host
host_inst_rate 20296 # Simulator instruction rate (inst/s)
host_op_rate 20294 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 440211 # Simulator tick rate (ticks/s)
host_mem_usage 275840 # Number of bytes of host memory used
host_seconds 0.32 # Real time elapsed on the host
sim_insts 6390 # Number of instructions simulated
sim_ops 6390 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 25600 # Number of bytes read from this memory
@ -45,6 +45,15 @@ system.l1_cntrl0.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl0.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl0.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl0.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl0.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl0.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl0.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl0.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl0.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl0.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl0.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl0.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l2_cntrl0.L2cacheMemory.num_data_array_reads 0 # number of data array reads
system.l2_cntrl0.L2cacheMemory.num_data_array_writes 0 # number of data array writes
system.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0 # number of tag array reads

18
tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini
View file

@ -107,7 +107,7 @@ version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
numa_high_bit=5
size=134217728
use_map=false
version=0
@ -136,15 +136,17 @@ version=0
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
buffer_size=0
cntrl_id=0
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl0.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -172,7 +174,7 @@ type=RubyCache
assoc=2
dataAccessLatency=1
dataArrayBanks=1
is_icache=false
is_icache=true
latency=3
replacement_policy=PSEUDO_LRU
resourceStalls=false
@ -181,6 +183,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl0.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=true

85
tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats
View file

@ -1,4 +1,4 @@
Real time: Sep/01/2012 14:03:04
Real time: Dec/11/2012 09:10:20
Profiler Stats
--------------
@ -7,18 +7,18 @@ Elapsed_time_in_minutes: 0
Elapsed_time_in_hours: 0
Elapsed_time_in_days: 0
Virtual_time_in_seconds: 0.41
Virtual_time_in_minutes: 0.00683333
Virtual_time_in_hours: 0.000113889
Virtual_time_in_days: 4.74537e-06
Virtual_time_in_seconds: 0.46
Virtual_time_in_minutes: 0.00766667
Virtual_time_in_hours: 0.000127778
Virtual_time_in_days: 5.32407e-06
Ruby_current_time: 52575
Ruby_start_time: 0
Ruby_cycles: 52575
mbytes_resident: 46.8984
mbytes_total: 257.648
resident_ratio: 0.182086
mbytes_resident: 52.6172
mbytes_total: 267.098
resident_ratio: 0.19704
ruby_cycles_executed: [ 52576 ]
@ -83,11 +83,11 @@ Resource Usage
page_size: 4096
user_time: 0
system_time: 0
page_reclaims: 9494
page_reclaims: 10056
page_faults: 0
swaps: 0
block_inputs: 0
block_outputs: 80
block_outputs: 96
Network Stats
-------------
@ -201,6 +201,9 @@ Data_all_Acks [368 ] 368
Ack [0 ] 0
Ack_all [0 ] 0
WB_Ack [124 ] 124
PF_Load [0 ] 0
PF_Ifetch [0 ] 0
PF_Store [0 ] 0
- Transitions -
NP Load [182 ] 182
@ -208,18 +211,26 @@ NP Ifetch [270 ] 270
NP Store [58 ] 58
NP Inv [162 ] 162
NP L1_Replacement [0 ] 0
NP PF_Load [0 ] 0
NP PF_Ifetch [0 ] 0
NP PF_Store [0 ] 0
I Load [22 ] 22
I Ifetch [30 ] 30
I Store [10 ] 10
I Inv [0 ] 0
I L1_Replacement [206 ] 206
I PF_Load [0 ] 0
I PF_Ifetch [0 ] 0
I PF_Store [0 ] 0
S Load [0 ] 0
S Ifetch [2285 ] 2285
S Store [0 ] 0
S Inv [124 ] 124
S L1_Replacement [172 ] 172
S PF_Load [0 ] 0
S PF_Store [0 ] 0
E Load [140 ] 140
E Ifetch [0 ] 0
@ -229,6 +240,8 @@ E L1_Replacement [79 ] 79
E Fwd_GETX [0 ] 0
E Fwd_GETS [0 ] 0
E Fwd_GET_INSTR [0 ] 0
E PF_Load [0 ] 0
E PF_Store [0 ] 0
M Load [71 ] 71
M Ifetch [0 ] 0
@ -238,6 +251,8 @@ M L1_Replacement [45 ] 45
M Fwd_GETX [0 ] 0
M Fwd_GETS [0 ] 0
M Fwd_GET_INSTR [0 ] 0
M PF_Load [0 ] 0
M PF_Store [0 ] 0
IS Load [0 ] 0
IS Ifetch [0 ] 0
@ -247,6 +262,8 @@ IS L1_Replacement [0 ] 0
IS Data_Exclusive [204 ] 204
IS DataS_fromL1 [0 ] 0
IS Data_all_Acks [300 ] 300
IS PF_Load [0 ] 0
IS PF_Store [0 ] 0
IM Load [0 ] 0
IM Ifetch [0 ] 0
@ -256,6 +273,8 @@ IM L1_Replacement [0 ] 0
IM Data [0 ] 0
IM Data_all_Acks [68 ] 68
IM Ack [0 ] 0
IM PF_Load [0 ] 0
IM PF_Store [0 ] 0
SM Load [0 ] 0
SM Ifetch [0 ] 0
@ -264,6 +283,8 @@ SM Inv [0 ] 0
SM L1_Replacement [0 ] 0
SM Ack [0 ] 0
SM Ack_all [0 ] 0
SM PF_Load [0 ] 0
SM PF_Store [0 ] 0
IS_I Load [0 ] 0
IS_I Ifetch [0 ] 0
@ -273,6 +294,8 @@ IS_I L1_Replacement [0 ] 0
IS_I Data_Exclusive [0 ] 0
IS_I DataS_fromL1 [0 ] 0
IS_I Data_all_Acks [0 ] 0
IS_I PF_Load [0 ] 0
IS_I PF_Store [0 ] 0
M_I Load [0 ] 0
M_I Ifetch [0 ] 0
@ -283,6 +306,8 @@ M_I Fwd_GETX [0 ] 0
M_I Fwd_GETS [0 ] 0
M_I Fwd_GET_INSTR [0 ] 0
M_I WB_Ack [124 ] 124
M_I PF_Load [0 ] 0
M_I PF_Store [0 ] 0
SINK_WB_ACK Load [0 ] 0
SINK_WB_ACK Ifetch [0 ] 0
@ -290,6 +315,46 @@ SINK_WB_ACK Store [0 ] 0
SINK_WB_ACK Inv [0 ] 0
SINK_WB_ACK L1_Replacement [0 ] 0
SINK_WB_ACK WB_Ack [0 ] 0
SINK_WB_ACK PF_Load [0 ] 0
SINK_WB_ACK PF_Store [0 ] 0
PF_IS Load [0 ] 0
PF_IS Ifetch [0 ] 0
PF_IS Store [0 ] 0
PF_IS Inv [0 ] 0
PF_IS L1_Replacement [0 ] 0
PF_IS Data_Exclusive [0 ] 0
PF_IS DataS_fromL1 [0 ] 0
PF_IS Data_all_Acks [0 ] 0
PF_IS PF_Load [0 ] 0
PF_IS PF_Store [0 ] 0
PF_IM Load [0 ] 0
PF_IM Ifetch [0 ] 0
PF_IM Store [0 ] 0
PF_IM Inv [0 ] 0
PF_IM L1_Replacement [0 ] 0
PF_IM Data [0 ] 0
PF_IM Data_all_Acks [0 ] 0
PF_IM Ack [0 ] 0
PF_IM PF_Load [0 ] 0
PF_IM PF_Store [0 ] 0
PF_SM Load [0 ] 0
PF_SM Ifetch [0 ] 0
PF_SM Store [0 ] 0
PF_SM Inv [0 ] 0
PF_SM L1_Replacement [0 ] 0
PF_SM Ack [0 ] 0
PF_SM Ack_all [0 ] 0
PF_IS_I Load [0 ] 0
PF_IS_I Store [0 ] 0
PF_IS_I Inv [0 ] 0
PF_IS_I L1_Replacement [0 ] 0
PF_IS_I Data_Exclusive [0 ] 0
PF_IS_I DataS_fromL1 [0 ] 0
PF_IS_I Data_all_Acks [0 ] 0
Cache Stats: system.l2_cntrl0.L2cacheMemory
system.l2_cntrl0.L2cacheMemory_total_misses: 547

19
tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt
View file

@ -4,11 +4,11 @@ sim_seconds 0.000053 # Nu
sim_ticks 52575 # Number of ticks simulated
final_tick 52575 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_inst_rate 27172 # Simulator instruction rate (inst/s)
host_op_rate 27165 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 554084 # Simulator tick rate (ticks/s)
host_mem_usage 263836 # Number of bytes of host memory used
host_seconds 0.10 # Real time elapsed on the host
host_inst_rate 11415 # Simulator instruction rate (inst/s)
host_op_rate 11414 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 232838 # Simulator tick rate (ticks/s)
host_mem_usage 273512 # Number of bytes of host memory used
host_seconds 0.23 # Real time elapsed on the host
sim_insts 2577 # Number of instructions simulated
sim_ops 2577 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 10340 # Number of bytes read from this memory
@ -45,6 +45,15 @@ system.l1_cntrl0.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl0.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl0.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl0.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl0.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl0.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl0.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl0.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl0.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl0.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl0.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl0.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l2_cntrl0.L2cacheMemory.num_data_array_reads 0 # number of data array reads
system.l2_cntrl0.L2cacheMemory.num_data_array_writes 0 # number of data array writes
system.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0 # number of tag array reads

112
tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini
View file

@ -250,15 +250,17 @@ port=system.funcbus.master[0]
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
buffer_size=0
cntrl_id=0
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl0.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -295,6 +297,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl0.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
@ -314,15 +326,17 @@ slave=system.cpu0.test
[system.l1_cntrl1]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl1.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl1.L1IcacheMemory
buffer_size=0
cntrl_id=1
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl1.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -359,6 +373,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl1.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl1.sequencer]
type=RubySequencer
access_phys_mem=false
@ -378,15 +402,17 @@ slave=system.cpu1.test
[system.l1_cntrl2]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl2.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl2.L1IcacheMemory
buffer_size=0
cntrl_id=2
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl2.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -423,6 +449,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl2.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl2.sequencer]
type=RubySequencer
access_phys_mem=false
@ -442,15 +478,17 @@ slave=system.cpu2.test
[system.l1_cntrl3]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl3.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl3.L1IcacheMemory
buffer_size=0
cntrl_id=3
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl3.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -487,6 +525,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl3.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl3.sequencer]
type=RubySequencer
access_phys_mem=false
@ -506,15 +554,17 @@ slave=system.cpu3.test
[system.l1_cntrl4]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl4.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl4.L1IcacheMemory
buffer_size=0
cntrl_id=4
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl4.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -551,6 +601,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl4.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl4.sequencer]
type=RubySequencer
access_phys_mem=false
@ -570,15 +630,17 @@ slave=system.cpu4.test
[system.l1_cntrl5]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl5.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl5.L1IcacheMemory
buffer_size=0
cntrl_id=5
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl5.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -615,6 +677,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl5.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl5.sequencer]
type=RubySequencer
access_phys_mem=false
@ -634,15 +706,17 @@ slave=system.cpu5.test
[system.l1_cntrl6]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl6.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl6.L1IcacheMemory
buffer_size=0
cntrl_id=6
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl6.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -679,6 +753,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl6.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl6.sequencer]
type=RubySequencer
access_phys_mem=false
@ -698,15 +782,17 @@ slave=system.cpu6.test
[system.l1_cntrl7]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl7.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl7.L1IcacheMemory
buffer_size=0
cntrl_id=7
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl7.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -743,6 +829,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl7.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl7.sequencer]
type=RubySequencer
access_phys_mem=false

99
tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats
View file

@ -1,24 +1,24 @@
Real time: Nov/10/2012 16:12:59
Real time: Dec/11/2012 09:13:04
Profiler Stats
--------------
Elapsed_time_in_seconds: 104
Elapsed_time_in_minutes: 1.73333
Elapsed_time_in_hours: 0.0288889
Elapsed_time_in_days: 0.0012037
Elapsed_time_in_seconds: 164
Elapsed_time_in_minutes: 2.73333
Elapsed_time_in_hours: 0.0455556
Elapsed_time_in_days: 0.00189815
Virtual_time_in_seconds: 104.72
Virtual_time_in_minutes: 1.74533
Virtual_time_in_hours: 0.0290889
Virtual_time_in_days: 0.00121204
Virtual_time_in_seconds: 103.36
Virtual_time_in_minutes: 1.72267
Virtual_time_in_hours: 0.0287111
Virtual_time_in_days: 0.0011963
Ruby_current_time: 7257449
Ruby_start_time: 0
Ruby_cycles: 7257449
mbytes_resident: 71.043
mbytes_total: 409.262
resident_ratio: 0.173598
mbytes_resident: 71.4336
mbytes_total: 409.793
resident_ratio: 0.174345
ruby_cycles_executed: [ 7257450 7257450 7257450 7257450 7257450 7257450 7257450 7257450 ]
@ -80,13 +80,13 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 36 count: 3321263 average: 1.55988 |
Resource Usage
--------------
page_size: 4096
user_time: 104
user_time: 103
system_time: 0
page_reclaims: 9518
page_faults: 95
page_reclaims: 9692
page_faults: 0
swaps: 0
block_inputs: 14064
block_outputs: 248
block_inputs: 0
block_outputs: 296
Network Stats
-------------
@ -331,6 +331,9 @@ Data_all_Acks [27578 27207 27259 27370 27420 27295 27237 27204 ] 218570
Ack [3 2 1 1 1 2 1 0 ] 11
Ack_all [3 2 1 1 1 2 1 0 ] 11
WB_Ack [40309 39563 40425 40081 40110 39623 40034 39662 ] 319807
PF_Load [0 0 0 0 0 0 0 0 ] 0
PF_Ifetch [0 0 0 0 0 0 0 0 ] 0
PF_Store [0 0 0 0 0 0 0 0 ] 0
- Transitions -
NP Load [49736 49359 50040 49632 49768 49368 49506 49370 ] 396779
@ -338,18 +341,26 @@ NP Ifetch [0 0 0 0 0 0 0 0 ] 0
NP Store [26890 26593 26629 26744 26783 26673 26639 26570 ] 213521
NP Inv [420 399 405 385 436 404 386 385 ] 3220
NP L1_Replacement [0 0 0 0 0 0 0 0 ] 0
NP PF_Load [0 0 0 0 0 0 0 0 ] 0
NP PF_Ifetch [0 0 0 0 0 0 0 0 ] 0
NP PF_Store [0 0 0 0 0 0 0 0 ] 0
I Load [9 8 4 8 8 9 9 9 ] 64
I Ifetch [0 0 0 0 0 0 0 0 ] 0
I Store [6 6 2 2 2 6 11 4 ] 39
I Inv [0 0 0 0 0 0 0 0 ] 0
I L1_Replacement [35950 36049 35879 35962 36061 36066 35776 35948 ] 287691
I PF_Load [0 0 0 0 0 0 0 0 ] 0
I PF_Ifetch [0 0 0 0 0 0 0 0 ] 0
I PF_Store [0 0 0 0 0 0 0 0 ] 0
S Load [0 0 0 0 0 0 0 0 ] 0
S Ifetch [0 0 0 0 0 0 0 0 ] 0
S Store [0 0 0 0 0 0 0 0 ] 0
S Inv [526 446 511 500 475 488 482 528 ] 3956
S L1_Replacement [361 336 360 328 375 347 329 325 ] 2761
S PF_Load [0 0 0 0 0 0 0 0 ] 0
S PF_Store [0 0 0 0 0 0 0 0 ] 0
E Load [1 0 0 2 2 0 0 0 ] 5
E Ifetch [0 0 0 0 0 0 0 0 ] 0
@ -359,6 +370,8 @@ E L1_Replacement [26159 25558 26202 25901 26080 25475 25987 25671 ] 207033
E Fwd_GETX [56 56 77 52 47 55 52 62 ] 457
E Fwd_GETS [14 7 7 7 7 9 12 5 ] 68
E Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
E PF_Load [0 0 0 0 0 0 0 0 ] 0
E PF_Store [0 0 0 0 0 0 0 0 ] 0
M Load [1 1 0 0 0 0 0 1 ] 3
M Ifetch [0 0 0 0 0 0 0 0 ] 0
@ -368,6 +381,8 @@ M L1_Replacement [14152 14005 14224 14181 14031 14149 14049 13992 ] 112783
M Fwd_GETX [26 36 27 32 34 25 30 32 ] 242
M Fwd_GETS [54 40 53 61 59 60 61 63 ] 451
M Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
M PF_Load [0 0 0 0 0 0 0 0 ] 0
M PF_Store [0 0 0 0 0 0 0 0 ] 0
IS Load [0 0 0 0 0 0 0 0 ] 0
IS Ifetch [0 0 0 0 0 0 0 0 ] 0
@ -377,6 +392,8 @@ IS L1_Replacement [297188 294582 298840 297864 297388 295578 296859 294148 ] 23
IS Data_Exclusive [48923 48630 49230 48877 48989 48607 48775 48593 ] 390624
IS DataS_fromL1 [133 124 182 136 147 148 149 152 ] 1171
IS Data_all_Acks [686 611 629 624 637 618 589 633 ] 5027
IS PF_Load [0 0 0 0 0 0 0 0 ] 0
IS PF_Store [0 0 0 0 0 0 0 0 ] 0
IM Load [0 0 0 0 0 0 0 0 ] 0
IM Ifetch [0 0 0 0 0 0 0 0 ] 0
@ -386,6 +403,8 @@ IM L1_Replacement [159689 159963 157731 158595 159682 159314 158837 157683 ] 12
IM Data [3 2 1 1 1 2 1 0 ] 11
IM Data_all_Acks [26892 26596 26629 26745 26783 26677 26648 26571 ] 213541
IM Ack [0 0 0 0 0 0 0 0 ] 0
IM PF_Load [0 0 0 0 0 0 0 0 ] 0
IM PF_Store [0 0 0 0 0 0 0 0 ] 0
SM Load [0 0 0 0 0 0 0 0 ] 0
SM Ifetch [0 0 0 0 0 0 0 0 ] 0
@ -394,6 +413,8 @@ SM Inv [0 0 0 0 0 0 0 0 ] 0
SM L1_Replacement [0 0 0 0 0 0 0 0 ] 0
SM Ack [3 2 1 1 1 2 1 0 ] 11
SM Ack_all [3 2 1 1 1 2 1 0 ] 11
SM PF_Load [0 0 0 0 0 0 0 0 ] 0
SM PF_Store [0 0 0 0 0 0 0 0 ] 0
IS_I Load [0 0 0 0 0 0 0 0 ] 0
IS_I Ifetch [0 0 0 0 0 0 0 0 ] 0
@ -403,6 +424,8 @@ IS_I L1_Replacement [0 0 0 0 0 0 0 0 ] 0
IS_I Data_Exclusive [0 0 0 0 0 0 0 0 ] 0
IS_I DataS_fromL1 [0 0 0 0 0 0 0 0 ] 0
IS_I Data_all_Acks [0 0 1 1 0 0 0 0 ] 2
IS_I PF_Load [0 0 0 0 0 0 0 0 ] 0
IS_I PF_Store [0 0 0 0 0 0 0 0 ] 0
M_I Load [0 0 0 0 0 0 0 0 ] 0
M_I Ifetch [0 0 0 0 0 0 0 0 ] 0
@ -413,6 +436,8 @@ M_I Fwd_GETX [133 112 108 132 117 140 116 106 ] 964
M_I Fwd_GETS [81 82 73 74 93 82 80 87 ] 652
M_I Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
M_I WB_Ack [2584 2356 2484 2618 2624 2482 2530 2483 ] 20161
M_I PF_Load [0 0 0 0 0 0 0 0 ] 0
M_I PF_Store [0 0 0 0 0 0 0 0 ] 0
SINK_WB_ACK Load [0 0 0 0 0 0 1 1 ] 2
SINK_WB_ACK Ifetch [0 0 0 0 0 0 0 0 ] 0
@ -420,6 +445,46 @@ SINK_WB_ACK Store [1 0 0 0 0 0 0 0 ] 1
SINK_WB_ACK Inv [22 19 28 17 32 25 23 27 ] 193
SINK_WB_ACK L1_Replacement [0 0 0 0 0 0 0 0 ] 0
SINK_WB_ACK WB_Ack [37725 37207 37941 37463 37486 37141 37504 37179 ] 299646
SINK_WB_ACK PF_Load [0 0 0 0 0 0 0 0 ] 0
SINK_WB_ACK PF_Store [0 0 0 0 0 0 0 0 ] 0
PF_IS Load [0 0 0 0 0 0 0 0 ] 0
PF_IS Ifetch [0 0 0 0 0 0 0 0 ] 0
PF_IS Store [0 0 0 0 0 0 0 0 ] 0
PF_IS Inv [0 0 0 0 0 0 0 0 ] 0
PF_IS L1_Replacement [0 0 0 0 0 0 0 0 ] 0
PF_IS Data_Exclusive [0 0 0 0 0 0 0 0 ] 0
PF_IS DataS_fromL1 [0 0 0 0 0 0 0 0 ] 0
PF_IS Data_all_Acks [0 0 0 0 0 0 0 0 ] 0
PF_IS PF_Load [0 0 0 0 0 0 0 0 ] 0
PF_IS PF_Store [0 0 0 0 0 0 0 0 ] 0
PF_IM Load [0 0 0 0 0 0 0 0 ] 0
PF_IM Ifetch [0 0 0 0 0 0 0 0 ] 0
PF_IM Store [0 0 0 0 0 0 0 0 ] 0
PF_IM Inv [0 0 0 0 0 0 0 0 ] 0
PF_IM L1_Replacement [0 0 0 0 0 0 0 0 ] 0
PF_IM Data [0 0 0 0 0 0 0 0 ] 0
PF_IM Data_all_Acks [0 0 0 0 0 0 0 0 ] 0
PF_IM Ack [0 0 0 0 0 0 0 0 ] 0
PF_IM PF_Load [0 0 0 0 0 0 0 0 ] 0
PF_IM PF_Store [0 0 0 0 0 0 0 0 ] 0
PF_SM Load [0 0 0 0 0 0 0 0 ] 0
PF_SM Ifetch [0 0 0 0 0 0 0 0 ] 0
PF_SM Store [0 0 0 0 0 0 0 0 ] 0
PF_SM Inv [0 0 0 0 0 0 0 0 ] 0
PF_SM L1_Replacement [0 0 0 0 0 0 0 0 ] 0
PF_SM Ack [0 0 0 0 0 0 0 0 ] 0
PF_SM Ack_all [0 0 0 0 0 0 0 0 ] 0
PF_IS_I Load [0 0 0 0 0 0 0 0 ] 0
PF_IS_I Store [0 0 0 0 0 0 0 0 ] 0
PF_IS_I Inv [0 0 0 0 0 0 0 0 ] 0
PF_IS_I L1_Replacement [0 0 0 0 0 0 0 0 ] 0
PF_IS_I Data_Exclusive [0 0 0 0 0 0 0 0 ] 0
PF_IS_I DataS_fromL1 [0 0 0 0 0 0 0 0 ] 0
PF_IS_I Data_all_Acks [0 0 0 0 0 0 0 0 ] 0
Cache Stats: system.l1_cntrl1.L1IcacheMemory
system.l1_cntrl1.L1IcacheMemory_total_misses: 0

78
tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt
View file

@ -4,9 +4,9 @@ sim_seconds 0.007257 # Nu
sim_ticks 7257449 # Number of ticks simulated
final_tick 7257449 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_tick_rate 69452 # Simulator tick rate (ticks/s)
host_mem_usage 419088 # Number of bytes of host memory used
host_seconds 104.50 # Real time elapsed on the host
host_tick_rate 44253 # Simulator tick rate (ticks/s)
host_mem_usage 419632 # Number of bytes of host memory used
host_seconds 164.00 # Real time elapsed on the host
system.l1_cntrl4.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl4.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl4.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@ -19,6 +19,15 @@ system.l1_cntrl4.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl4.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl4.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl4.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl4.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl4.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl4.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl4.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl4.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl4.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl4.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl4.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl4.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl5.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl5.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl5.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@ -31,6 +40,15 @@ system.l1_cntrl5.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl5.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl5.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl5.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl5.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl5.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl5.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl5.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl5.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl5.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl5.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl5.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl5.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl6.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl6.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl6.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@ -43,6 +61,15 @@ system.l1_cntrl6.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl6.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl6.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl6.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl6.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl6.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl6.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl6.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl6.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl6.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl6.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl6.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl6.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl7.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl7.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl7.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@ -55,6 +82,15 @@ system.l1_cntrl7.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl7.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl7.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl7.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl7.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl7.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl7.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl7.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl7.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl7.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl7.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl7.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl7.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl0.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl0.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@ -67,6 +103,15 @@ system.l1_cntrl0.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl0.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl0.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl0.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl0.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl0.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl0.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl0.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl0.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl0.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl0.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl0.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl1.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl1.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl1.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@ -79,6 +124,15 @@ system.l1_cntrl1.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl1.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl1.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl1.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl1.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl1.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl1.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl1.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl1.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl1.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl1.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl1.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl1.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl2.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl2.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl2.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@ -91,6 +145,15 @@ system.l1_cntrl2.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl2.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl2.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl2.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl2.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl2.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl2.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl2.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl2.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl2.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl2.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl2.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl2.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl3.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl3.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl3.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@ -103,6 +166,15 @@ system.l1_cntrl3.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl3.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl3.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl3.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl3.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl3.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl3.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl3.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl3.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl3.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl3.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl3.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl3.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l2_cntrl0.L2cacheMemory.num_data_array_reads 0 # number of data array reads
system.l2_cntrl0.L2cacheMemory.num_data_array_writes 0 # number of data array writes
system.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0 # number of tag array reads

18
tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini
View file

@ -46,7 +46,7 @@ version=0
[system.dir_cntrl0.directory]
type=RubyDirectoryMemory
map_levels=4
numa_high_bit=6
numa_high_bit=5
size=134217728
use_map=false
version=0
@ -75,15 +75,17 @@ version=0
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory sequencer
children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
buffer_size=0
cntrl_id=0
enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
prefetcher=system.l1_cntrl0.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@ -111,7 +113,7 @@ type=RubyCache
assoc=2
dataAccessLatency=1
dataArrayBanks=1
is_icache=false
is_icache=true
latency=3
replacement_policy=PSEUDO_LRU
resourceStalls=false
@ -120,6 +122,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
[system.l1_cntrl0.prefetcher]
type=Prefetcher
cross_page=false
nonunit_filter=8
num_startup_pfs=1
num_streams=4
pf_per_stream=1
train_misses=4
unit_filter=8
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false

85
tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats
View file

@ -1,4 +1,4 @@
Real time: Sep/01/2012 14:05:06
Real time: Dec/11/2012 09:10:20
Profiler Stats
--------------
@ -7,18 +7,18 @@ Elapsed_time_in_minutes: 0
Elapsed_time_in_hours: 0
Elapsed_time_in_days: 0
Virtual_time_in_seconds: 0.52
Virtual_time_in_minutes: 0.00866667
Virtual_time_in_hours: 0.000144444
Virtual_time_in_days: 6.01852e-06
Virtual_time_in_seconds: 0.56
Virtual_time_in_minutes: 0.00933333
Virtual_time_in_hours: 0.000155556
Virtual_time_in_days: 6.48148e-06
Ruby_current_time: 318321
Ruby_start_time: 0
Ruby_cycles: 318321
mbytes_resident: 44.9961
mbytes_total: 254.652
resident_ratio: 0.176758
mbytes_resident: 49.5391
mbytes_total: 264.797
resident_ratio: 0.187128
ruby_cycles_executed: [ 318322 ]
@ -83,11 +83,11 @@ Resource Usage
page_size: 4096
user_time: 0
system_time: 0
page_reclaims: 8497
page_reclaims: 9268
page_faults: 0
swaps: 0
block_inputs: 0
block_outputs: 80
block_outputs: 88
Network Stats
-------------
@ -201,6 +201,9 @@ Data_all_Acks [874 ] 874
Ack [0 ] 0
Ack_all [1 ] 1
WB_Ack [755 ] 755
PF_Load [0 ] 0
PF_Ifetch [0 ] 0
PF_Store [0 ] 0
- Transitions -
NP Load [42 ] 42
@ -208,18 +211,26 @@ NP Ifetch [56 ] 56
NP Store [818 ] 818
NP Inv [1 ] 1
NP L1_Replacement [0 ] 0
NP PF_Load [0 ] 0
NP PF_Ifetch [0 ] 0
NP PF_Store [0 ] 0
I Load [0 ] 0
I Ifetch [0 ] 0
I Store [0 ] 0
I Inv [0 ] 0
I L1_Replacement [145 ] 145
I PF_Load [0 ] 0
I PF_Ifetch [0 ] 0
I PF_Store [0 ] 0
S Load [0 ] 0
S Ifetch [0 ] 0
S Store [1 ] 1
S Inv [31 ] 31
S L1_Replacement [11 ] 11
S PF_Load [0 ] 0
S PF_Store [0 ] 0
E Load [0 ] 0
E Ifetch [0 ] 0
@ -229,6 +240,8 @@ E L1_Replacement [34 ] 34
E Fwd_GETX [0 ] 0
E Fwd_GETS [0 ] 0
E Fwd_GET_INSTR [0 ] 0
E PF_Load [0 ] 0
E PF_Store [0 ] 0
M Load [2 ] 2
M Ifetch [0 ] 0
@ -238,6 +251,8 @@ M L1_Replacement [722 ] 722
M Fwd_GETX [0 ] 0
M Fwd_GETS [0 ] 0
M Fwd_GET_INSTR [0 ] 0
M PF_Load [0 ] 0
M PF_Store [0 ] 0
IS Load [0 ] 0
IS Ifetch [0 ] 0
@ -247,6 +262,8 @@ IS L1_Replacement [374 ] 374
IS Data_Exclusive [41 ] 41
IS DataS_fromL1 [0 ] 0
IS Data_all_Acks [43 ] 43
IS PF_Load [0 ] 0
IS PF_Store [0 ] 0
IM Load [0 ] 0
IM Ifetch [0 ] 0
@ -256,6 +273,8 @@ IM L1_Replacement [9112 ] 9112
IM Data [0 ] 0
IM Data_all_Acks [817 ] 817
IM Ack [0 ] 0
IM PF_Load [0 ] 0
IM PF_Store [0 ] 0
SM Load [0 ] 0
SM Ifetch [0 ] 0
@ -264,6 +283,8 @@ SM Inv [0 ] 0
SM L1_Replacement [0 ] 0
SM Ack [0 ] 0
SM Ack_all [1 ] 1
SM PF_Load [0 ] 0
SM PF_Store [0 ] 0
IS_I Load [0 ] 0
IS_I Ifetch [0 ] 0
@ -273,6 +294,8 @@ IS_I L1_Replacement [0 ] 0
IS_I Data_Exclusive [0 ] 0
IS_I DataS_fromL1 [0 ] 0
IS_I Data_all_Acks [14 ] 14
IS_I PF_Load [0 ] 0
IS_I PF_Store [0 ] 0
M_I Load [0 ] 0
M_I Ifetch [10 ] 10
@ -283,6 +306,8 @@ M_I Fwd_GETX [0 ] 0
M_I Fwd_GETS [0 ] 0
M_I Fwd_GET_INSTR [0 ] 0
M_I WB_Ack [340 ] 340
M_I PF_Load [0 ] 0
M_I PF_Store [0 ] 0
SINK_WB_ACK Load [0 ] 0
SINK_WB_ACK Ifetch [1 ] 1
@ -290,6 +315,46 @@ SINK_WB_ACK Store [0 ] 0
SINK_WB_ACK Inv [0 ] 0
SINK_WB_ACK L1_Replacement [0 ] 0
SINK_WB_ACK WB_Ack [415 ] 415
SINK_WB_ACK PF_Load [0 ] 0
SINK_WB_ACK PF_Store [0 ] 0
PF_IS Load [0 ] 0
PF_IS Ifetch [0 ] 0
PF_IS Store [0 ] 0
PF_IS Inv [0 ] 0
PF_IS L1_Replacement [0 ] 0
PF_IS Data_Exclusive [0 ] 0
PF_IS DataS_fromL1 [0 ] 0
PF_IS Data_all_Acks [0 ] 0
PF_IS PF_Load [0 ] 0
PF_IS PF_Store [0 ] 0
PF_IM Load [0 ] 0
PF_IM Ifetch [0 ] 0
PF_IM Store [0 ] 0
PF_IM Inv [0 ] 0
PF_IM L1_Replacement [0 ] 0
PF_IM Data [0 ] 0
PF_IM Data_all_Acks [0 ] 0
PF_IM Ack [0 ] 0
PF_IM PF_Load [0 ] 0
PF_IM PF_Store [0 ] 0
PF_SM Load [0 ] 0
PF_SM Ifetch [0 ] 0
PF_SM Store [0 ] 0
PF_SM Inv [0 ] 0
PF_SM L1_Replacement [0 ] 0
PF_SM Ack [0 ] 0
PF_SM Ack_all [0 ] 0
PF_IS_I Load [0 ] 0
PF_IS_I Store [0 ] 0
PF_IS_I Inv [0 ] 0
PF_IS_I L1_Replacement [0 ] 0
PF_IS_I Data_Exclusive [0 ] 0
PF_IS_I DataS_fromL1 [0 ] 0
PF_IS_I Data_all_Acks [0 ] 0
Cache Stats: system.l2_cntrl0.L2cacheMemory
system.l2_cntrl0.L2cacheMemory_total_misses: 874

15
tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt
View file

@ -4,9 +4,9 @@ sim_seconds 0.000318 # Nu
sim_ticks 318321 # Number of ticks simulated
final_tick 318321 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_tick_rate 1505639 # Simulator tick rate (ticks/s)
host_mem_usage 260768 # Number of bytes of host memory used
host_seconds 0.21 # Real time elapsed on the host
host_tick_rate 1374742 # Simulator tick rate (ticks/s)
host_mem_usage 271156 # Number of bytes of host memory used
host_seconds 0.23 # Real time elapsed on the host
system.l1_cntrl0.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl0.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@ -19,6 +19,15 @@ system.l1_cntrl0.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl0.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl0.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.l1_cntrl0.prefetcher.miss_observed 0 # number of misses observed
system.l1_cntrl0.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
system.l1_cntrl0.prefetcher.prefetches_requested 0 # number of prefetch requests made
system.l1_cntrl0.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
system.l1_cntrl0.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
system.l1_cntrl0.prefetcher.hits 0 # number of prefetched blocks accessed
system.l1_cntrl0.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
system.l1_cntrl0.prefetcher.pages_crossed 0 # number of prefetches across pages
system.l1_cntrl0.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l2_cntrl0.L2cacheMemory.num_data_array_reads 0 # number of data array reads
system.l2_cntrl0.L2cacheMemory.num_data_array_writes 0 # number of data array writes
system.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0 # number of tag array reads