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alpha: Make the TLB cache to actually work.

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Improve MRU checking for StaticInst, Bus, TLB

--HG--
extra : convert_revision : 9116b5655cd2986aeb4205438aad4a0f5a440006
This commit is contained in:
Vincentius Robby 2007-08-08 14:18:09 -04:00
parent ef32494e72
commit 13d10e844c
3 changed files with 51 additions and 37 deletions
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28
src/arch/alpha/tlb.cc
View file

@ -80,16 +80,21 @@ TLB::lookup(Addr vpn, uint8_t asn) const
// assume not found... // assume not found...
PTE *retval = NULL; PTE *retval = NULL;
if (PTECache[0] && vpn == PTECache[0]->tag && if (PTECache[0]) {
(PTECache[0]->asma || PTECache[0]->asn == asn)) if (vpn == PTECache[0]->tag &&
retval = PTECache[0]; (PTECache[0]->asma || PTECache[0]->asn == asn))
else if (PTECache[1] && vpn == PTECache[1]->tag && retval = PTECache[0];
(PTECache[1]->asma || PTECache[1]->asn == asn)) else if (PTECache[1]) {
retval = PTECache[1]; if (vpn == PTECache[1]->tag &&
else if (PTECache[2] && vpn == PTECache[2]->tag && (PTECache[1]->asma || PTECache[1]->asn == asn))
(PTECache[2]->asma || PTECache[2]->asn == asn)) retval = PTECache[1];
retval = PTECache[2]; else if (PTECache[2] && vpn == PTECache[2]->tag &&
else { (PTECache[2]->asma || PTECache[2]->asn == asn))
retval = PTECache[2];
}
}
if (retval == NULL)
PageTable::const_iterator i = lookupTable.find(vpn); PageTable::const_iterator i = lookupTable.find(vpn);
if (i != lookupTable.end()) { if (i != lookupTable.end()) {
while (i->first == vpn) { while (i->first == vpn) {
@ -98,6 +103,9 @@ TLB::lookup(Addr vpn, uint8_t asn) const
assert(pte->valid); assert(pte->valid);
if (vpn == pte->tag && (pte->asma || pte->asn == asn)) { if (vpn == pte->tag && (pte->asma || pte->asn == asn)) {
retval = pte; retval = pte;
PTECache[2] = PTECache[1];
PTECache[1] = PTECache[0];
PTECache[0] = pte;
break; break;
} }

23
src/cpu/static_inst.hh
View file

@ -597,20 +597,19 @@ StaticInst::decode(StaticInst::ExtMachInst mach_inst, Addr addr)
Addr page_addr = addr & ~(TheISA::PageBytes - 1); Addr page_addr = addr & ~(TheISA::PageBytes - 1);
// checks recently decoded addresses // checks recently decoded addresses
if (recentDecodes[0].decodePage && if (recentDecodes[0].decodePage) {
page_addr == recentDecodes[0].page_addr) { if (page_addr == recentDecodes[0].page_addr) {
if (recentDecodes[0].decodePage->decoded(mach_inst, addr)) if (recentDecodes[0].decodePage->decoded(mach_inst, addr))
return recentDecodes[0].decodePage->getInst(addr); return recentDecodes[0].decodePage->getInst(addr);
return searchCache(mach_inst, addr, recentDecodes[0].decodePage); return searchCache(mach_inst, addr, recentDecodes[0].decodePage);
} } else if (recentDecodes[1].decodePage &&
page_addr == recentDecodes[1].page_addr) {
if (recentDecodes[1].decodePage->decoded(mach_inst, addr))
return recentDecodes[1].decodePage->getInst(addr);
if (recentDecodes[1].decodePage && return searchCache(mach_inst, addr, recentDecodes[1].decodePage);
page_addr == recentDecodes[1].page_addr) { }
if (recentDecodes[1].decodePage->decoded(mach_inst, addr))
return recentDecodes[1].decodePage->getInst(addr);
return searchCache(mach_inst, addr, recentDecodes[1].decodePage);
} }
// searches the page containing the address to decode // searches the page containing the address to decode

37
src/mem/bus.hh
View file

@ -193,15 +193,17 @@ class Bus : public MemObject
// Checks the cache and returns the id of the port that has the requested // Checks the cache and returns the id of the port that has the requested
// address within its range // address within its range
inline int checkPortCache(Addr addr) { inline int checkPortCache(Addr addr) {
if (portCache[0].valid && addr >= portCache[0].start && if (portCache[0].valid) {
addr < portCache[0].end) { if (addr >= portCache[0].start && addr < portCache[0].end) {
return portCache[0].id; return portCache[0].id;
} else if (portCache[1].valid && addr >= portCache[1].start && } else if (portCache[1].valid) {
addr < portCache[1].end) { if (addr >= portCache[1].start && addr < portCache[1].end) {
return portCache[1].id; return portCache[1].id;
} else if (portCache[2].valid && addr >= portCache[2].start && } else if (portCache[2].valid && addr >= portCache[2].start &&
addr < portCache[2].end) { addr < portCache[2].end) {
return portCache[2].id; return portCache[2].id;
}
}
} }
return -1; return -1;
@ -310,12 +312,17 @@ class Bus : public MemObject
// Checks the peer port interfaces cache for the port id and returns // Checks the peer port interfaces cache for the port id and returns
// a pointer to the matching port // a pointer to the matching port
inline BusPort* checkBusCache(short id) { inline BusPort* checkBusCache(short id) {
if (busCache[0].valid && id == busCache[0].id) { if (busCache[0].valid) {
return busCache[0].port; if (id == busCache[0].id) {
} else if (busCache[1].valid && id == busCache[1].id) { return busCache[0].port;
return busCache[1].port; if (busCache[1].valid) {
} else if (busCache[2].valid && id == busCache[2].id) { if (id == busCache[1].id) {
return busCache[2].port; return busCache[1].port;
if (busCache[2].valid && id == busCache[2].id)
return busCache[2].port;
}
}
}
} }
return NULL; return NULL;