dev: Move existing PCI device functionality to src/dev/pci

Move pcidev.(hh|cc) to src/dev/pci/device.(hh|cc) and update existing
devices to use the new header location. This also renames the PCIDEV
debug flag to have a capitalization that is consistent with the PCI
host and other devices.

--HG--
rename : src/dev/Pci.py => src/dev/pci/PciDevice.py
rename : src/dev/pcidev.cc => src/dev/pci/device.cc
rename : src/dev/pcidev.hh => src/dev/pci/device.hh
rename : src/dev/pcireg.h => src/dev/pci/pcireg.h

src/dev/CopyEngine.py

@@ -29,7 +29,7 @@
 from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
-from Pci import PciDevice
+from PciDevice import PciDevice
 
 class CopyEngine(PciDevice):
     type = 'CopyEngine'

src/dev/Ethernet.py

@@ -41,7 +41,7 @@
 from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
-from Pci import PciDevice
+from PciDevice import PciDevice
 
 class EtherObject(SimObject):
     type = 'EtherObject'

src/dev/Ide.py

@@ -28,7 +28,7 @@
 
 from m5.SimObject import SimObject
 from m5.params import *
-from Pci import PciDevice
+from PciDevice import PciDevice
 
 class IdeID(Enum): vals = ['master', 'slave']
 

src/dev/SConscript

@@ -45,7 +45,6 @@ SimObject('DiskImage.py')
 SimObject('Ethernet.py')
 SimObject('I2C.py')
 SimObject('Ide.py')
-SimObject('Pci.py')
 SimObject('Platform.py')
 SimObject('SimpleDisk.py')
 SimObject('Terminal.py')
@@ -73,7 +72,6 @@ Source('ide_disk.cc')
 Source('intel_8254_timer.cc')
 Source('mc146818.cc')
 Source('ns_gige.cc')
-Source('pcidev.cc')
 Source('pixelpump.cc')
 Source('pktfifo.cc')
 Source('platform.cc')
@@ -103,7 +101,6 @@ DebugFlag('IdeCtrl')
 DebugFlag('IdeDisk')
 DebugFlag('Intel8254Timer')
 DebugFlag('MC146818')
-DebugFlag('PCIDEV')
 DebugFlag('SimpleDisk')
 DebugFlag('SimpleDiskData')
 DebugFlag('Terminal')

src/dev/alpha/tsunami_pchip.cc

@@ -44,7 +44,7 @@
 #include "dev/alpha/tsunami.hh"
 #include "dev/alpha/tsunami_cchip.hh"
 #include "dev/alpha/tsunamireg.h"
-#include "dev/pcidev.hh"
+#include "dev/pci/device.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "sim/system.hh"

src/dev/copy_engine.hh

@@ -53,7 +53,7 @@
 #include "base/cp_annotate.hh"
 #include "base/statistics.hh"
 #include "dev/copy_engine_defs.hh"
-#include "dev/pcidev.hh"
+#include "dev/pci/device.hh"
 #include "params/CopyEngine.hh"
 #include "sim/drain.hh"
 #include "sim/eventq.hh"

src/dev/etherdevice.hh

@@ -37,7 +37,7 @@
 #define __DEV_ETHERDEVICE_HH__
 
 #include "base/statistics.hh"
-#include "dev/pcidev.hh"
+#include "dev/pci/device.hh"
 #include "params/EtherDevice.hh"
 #include "params/EtherDevBase.hh"
 #include "sim/sim_object.hh"

src/dev/i8254xGBe.hh

@@ -46,7 +46,7 @@
 #include "dev/etherint.hh"
 #include "dev/etherpkt.hh"
 #include "dev/i8254xGBe_defs.hh"
-#include "dev/pcidev.hh"
+#include "dev/pci/device.hh"
 #include "dev/pktfifo.hh"
 #include "params/IGbE.hh"
 #include "sim/eventq.hh"

src/dev/ide_ctrl.hh

@@ -39,8 +39,7 @@
 
 #include "base/bitunion.hh"
 #include "dev/io_device.hh"
-#include "dev/pcidev.hh"
+#include "dev/pci/device.hh"
-#include "dev/pcireg.h"
 #include "params/IdeController.hh"
 
 class IdeDisk;

src/dev/pci/PciDevice.py

@@ -47,7 +47,7 @@ from PciHost import PciHost
 class PciDevice(DmaDevice):
     type = 'PciDevice'
     cxx_class = 'PciDevice'
-    cxx_header = "dev/pcidev.hh"
+    cxx_header = "dev/pci/device.hh"
     abstract = True
 
     host = Param.PciHost(Parent.any, "PCI host")

src/dev/pci/SConscript

@@ -12,6 +12,9 @@
 # unmodified and in its entirety in all distributions of the software,
 # modified or unmodified, in source code or in binary form.
 #
+# Copyright (c) 2006 The Regents of The University of Michigan
+# All rights reserved.
+#
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are
 # met: redistributions of source code must retain the above copyright
@@ -35,14 +38,20 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
-# Authors: Andreas Sandberg
+# Authors: Steve Reinhardt
+#          Gabe Black
+#          Andreas Sandberg
 
 Import('*')
 
 if env['TARGET_ISA'] == 'null':
     Return()
 
+SimObject('PciDevice.py')
+Source('device.cc')
+DebugFlag('PciDevice')
+
 SimObject('PciHost.py')
 Source('host.cc')
-
 DebugFlag('PciHost')
+

src/dev/pci/device.cc

@@ -46,6 +46,8 @@
  * A single PCI device configuration space entry.
  */
 
+#include "dev/pci/device.hh"
+
 #include <list>
 #include <string>
 #include <vector>
@@ -55,8 +57,7 @@
 #include "base/misc.hh"
 #include "base/str.hh"
 #include "base/trace.hh"
-#include "debug/PCIDEV.hh"
+#include "debug/PciDevice.hh"
-#include "dev/pcidev.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "sim/byteswap.hh"
@@ -246,21 +247,21 @@ PciDevice::readConfig(PacketPtr pkt)
     switch (pkt->getSize()) {
       case sizeof(uint8_t):
         pkt->set<uint8_t>(config.data[offset]);
-        DPRINTF(PCIDEV,
+        DPRINTF(PciDevice,
             "readConfig:  dev %#x func %#x reg %#x 1 bytes: data = %#x\n",
             _busAddr.dev, _busAddr.func, offset,
             (uint32_t)pkt->get<uint8_t>());
         break;
       case sizeof(uint16_t):
         pkt->set<uint16_t>(*(uint16_t*)&config.data[offset]);
-        DPRINTF(PCIDEV,
+        DPRINTF(PciDevice,
             "readConfig:  dev %#x func %#x reg %#x 2 bytes: data = %#x\n",
             _busAddr.dev, _busAddr.func, offset,
             (uint32_t)pkt->get<uint16_t>());
         break;
       case sizeof(uint32_t):
         pkt->set<uint32_t>(*(uint32_t*)&config.data[offset]);
-        DPRINTF(PCIDEV,
+        DPRINTF(PciDevice,
             "readConfig:  dev %#x func %#x reg %#x 4 bytes: data = %#x\n",
             _busAddr.dev, _busAddr.func, offset,
             (uint32_t)pkt->get<uint32_t>());
@@ -328,7 +329,7 @@ PciDevice::writeConfig(PacketPtr pkt)
           default:
             panic("writing to a read only register");
         }
-        DPRINTF(PCIDEV,
+        DPRINTF(PciDevice,
             "writeConfig: dev %#x func %#x reg %#x 1 bytes: data = %#x\n",
             _busAddr.dev, _busAddr.func, offset,
             (uint32_t)pkt->get<uint8_t>());
@@ -347,7 +348,7 @@ PciDevice::writeConfig(PacketPtr pkt)
           default:
             panic("writing to a read only register");
         }
-        DPRINTF(PCIDEV,
+        DPRINTF(PciDevice,
             "writeConfig: dev %#x func %#x reg %#x 2 bytes: data = %#x\n",
             _busAddr.dev, _busAddr.func, offset,
             (uint32_t)pkt->get<uint16_t>());
@@ -407,9 +408,9 @@ PciDevice::writeConfig(PacketPtr pkt)
             break;
 
           default:
-            DPRINTF(PCIDEV, "Writing to a read only register");
+            DPRINTF(PciDevice, "Writing to a read only register");
         }
-        DPRINTF(PCIDEV,
+        DPRINTF(PciDevice,
             "writeConfig: dev %#x func %#x reg %#x 4 bytes: data = %#x\n",
             _busAddr.dev, _busAddr.func, offset,
             (uint32_t)pkt->get<uint32_t>());

src/dev/pci/device.hh

@@ -46,15 +46,15 @@
  * Interface for devices using PCI configuration
  */
 
-#ifndef __DEV_PCIDEV_HH__
+#ifndef __DEV_PCI_DEVICE_HH__
-#define __DEV_PCIDEV_HH__
+#define __DEV_PCI_DEVICE_HH__
 
 #include <cstring>
 #include <vector>
 
 #include "dev/dma_device.hh"
-#include "dev/pcireg.h"
 #include "dev/pci/host.hh"
+#include "dev/pci/pcireg.h"
 #include "params/PciDevice.hh"
 #include "sim/byteswap.hh"
 
@@ -224,4 +224,4 @@ class PciDevice : public DmaDevice
 
     const PciBusAddr &busAddr() const { return _busAddr; }
 };
-#endif // __DEV_PCIDEV_HH__
+#endif // __DEV_PCI_DEVICE_HH__

src/dev/pci/host.cc

@@ -42,7 +42,7 @@
 #include <utility>
 
 #include "debug/PciHost.hh"
-#include "dev/pcidev.hh"
+#include "dev/pci/device.hh"
 #include "dev/platform.hh"
 #include "params/GenericPciHost.hh"
 #include "params/PciHost.hh"

src/dev/sinic.hh

@@ -37,7 +37,7 @@
 #include "dev/etherint.hh"
 #include "dev/etherpkt.hh"
 #include "dev/io_device.hh"
-#include "dev/pcidev.hh"
+#include "dev/pci/device.hh"
 #include "dev/pktfifo.hh"
 #include "dev/sinicreg.hh"
 #include "params/Sinic.hh"

src/dev/virtio/VirtIO.py

@@ -41,7 +41,7 @@ from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
 from Device import PioDevice
-from Pci import PciDevice
+from PciDevice import PciDevice
 
 
 class VirtIODeviceBase(SimObject):

src/dev/virtio/pci.hh

@@ -42,7 +42,7 @@
 
 #include "base/statistics.hh"
 #include "dev/virtio/base.hh"
-#include "dev/pcidev.hh"
+#include "dev/pci/device.hh"
 
 struct PciVirtIOParams;