Fix bugs in tlbmap (and thus rangemap since the code is nearly identical)
Deal with block initializing stores (by doing nothing, at some point we might want to do the write hint 64 like thing) Fix tcc instruction igoner in legion-lock stuff to be correct in all cases Have console interrupts warn rather than panicing until we figure out what to do with interrupts src/arch/sparc/miscregfile.cc: src/arch/sparc/miscregfile.hh: add a magic miscreg which reads all the bits the tlb needs in one go src/arch/sparc/tlb.cc: initialized the context type and id to reasonable values and handle block init stores src/arch/sparc/tlb_map.hh: fix bug in tlb map code src/base/range_map.hh: fix bug in rangemap code and add range_multimap (these are probably useful for bus range stuff) src/cpu/exetrace.cc: fixup tcc ignore code to be correct src/dev/sparc/t1000.cc: make console interrupt stuff warn instead of panicing until we get interrupt stuff figured out src/unittest/rangemaptest.cc: fix up the rangemap unit test to catch the missing case --HG-- extra : convert_revision : 70604a8b5d0553aa0b0bd7649f775a0cfa8267a5
This commit is contained in:
parent
4947bf276e
commit
139519ef87
9 changed files with 252 additions and 12 deletions
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@ -129,6 +129,26 @@ void MiscRegFile::clear()
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MiscReg MiscRegFile::readReg(int miscReg)
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{
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switch (miscReg) {
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case MISCREG_TLB_DATA:
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/* Package up all the data for the tlb:
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* 6666555555555544444444443333333333222222222211111111110000000000
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* 3210987654321098765432109876543210987654321098765432109876543210
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* secContext | priContext | |tl|partid| |||||^hpriv
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* ||||^red
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* |||^priv
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* ||^am
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* |^lsuim
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* ^lsudm
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*/
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return bits((uint64_t)hpstate,2,2) |
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bits((uint64_t)hpstate,5,5) << 1 |
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bits((uint64_t)pstate,3,2) << 2 |
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bits((uint64_t)lsuCtrlReg,3,2) << 4 |
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bits((uint64_t)partId,7,0) << 8 |
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bits((uint64_t)tl,2,0) << 16 |
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(uint64_t)priContext << 32 |
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(uint64_t)secContext << 48;
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case MISCREG_Y:
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return y;
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case MISCREG_CCR:
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@ -137,6 +137,8 @@ namespace SparcISA
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MISCREG_QUEUE_NRES_ERROR_HEAD,
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MISCREG_QUEUE_NRES_ERROR_TAIL,
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/* All the data for the TLB packed up in one register. */
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MISCREG_TLB_DATA,
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MISCREG_NUMMISCREGS
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};
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@ -446,8 +446,8 @@ DTB::translate(RequestPtr &req, ThreadContext *tc, bool write)
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bool real = false;
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Addr vaddr = req->getVaddr();
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Addr size = req->getSize();
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ContextType ct;
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int context;
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ContextType ct = Primary;
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int context = 0;
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ASI asi;
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TlbEntry *e;
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@ -508,6 +508,9 @@ DTB::translate(RequestPtr &req, ThreadContext *tc, bool write)
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panic("Block ASIs not supported\n");
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if (AsiIsNoFault(asi))
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panic("No Fault ASIs not supported\n");
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if (write && asi == ASI_LDTX_P)
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// block init store (like write hint64)
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goto continueDtbFlow;
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if (AsiIsTwin(asi))
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panic("Twin ASIs not supported\n");
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if (AsiIsPartialStore(asi))
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@ -53,8 +53,15 @@ class TlbMap
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i = tree.upper_bound(r);
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if (i == tree.begin())
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// Nothing could match, so return end()
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return tree.end();
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if (r.real == i->first.real &&
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r.partitionId == i->first.partitionId &&
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i->first.va < r.va + r.size &&
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i->first.va+i->first.size >= r.va &&
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(r.real || r.contextId == i->first.contextId))
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return i;
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else
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// Nothing could match, so return end()
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return tree.end();
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i--;
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@ -52,9 +52,13 @@ class range_map
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i = tree.upper_bound(r);
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if (i == tree.begin())
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// Nothing could match, so return end()
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return tree.end();
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if (i == tree.begin()) {
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if (i->first.start <= r.end && i->first.end >= r.start)
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return i;
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else
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// Nothing could match, so return end()
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return tree.end();
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}
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i--;
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@ -126,4 +130,117 @@ class range_map
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};
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template <class T,class V>
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class range_multimap
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{
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private:
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typedef std::multimap<Range<T>,V> RangeMap;
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RangeMap tree;
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public:
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typedef typename RangeMap::iterator iterator;
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template <class U>
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std::pair<iterator,iterator> find(const Range<U> &r)
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{
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iterator i;
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iterator j;
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i = tree.lower_bound(r);
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if (i == tree.begin()) {
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if (i->first.start <= r.end && i->first.end >= r.start)
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return std::make_pair<iterator, iterator>(i,i);
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else
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// Nothing could match, so return end()
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return std::make_pair<iterator, iterator>(tree.end(), tree.end());
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}
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i--;
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if (i->first.start <= r.end && i->first.end >= r.start) {
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// we have at least one match
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j = i;
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i--;
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while (i->first.start <= r.end && i->first.end >=
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r.start) {
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if (i == tree.begin())
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break;
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i--;
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}
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if (i == tree.begin() && i->first.start <= r.end && i->first.end >=
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r.start)
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return std::make_pair<iterator, iterator>(i,j);
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i++;
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return std::make_pair<iterator, iterator>(i,j);
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}
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return std::make_pair<iterator, iterator>(tree.end(), tree.end());
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}
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template <class U>
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bool intersect(const Range<U> &r)
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{
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std::pair<iterator,iterator> p;
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p = find(r);
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if (p.first != tree.end())
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return true;
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return false;
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}
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template <class U,class W>
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iterator insert(const Range<U> &r, const W d)
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{
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std::pair<iterator,iterator> p;
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p = find(r);
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if (p.first->first.start == r.start && p.first->first.end == r.end ||
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p.first == tree.end())
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return tree.insert(std::make_pair<Range<T>,V>(r, d));
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else
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return tree.end();
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}
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size_t erase(T k)
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{
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return tree.erase(k);
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}
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void erase(iterator p)
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{
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tree.erase(p);
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}
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void erase(iterator p, iterator q)
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{
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tree.erase(p,q);
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}
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void clear()
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{
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tree.erase(tree.begin(), tree.end());
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}
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iterator begin()
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{
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return tree.begin();
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}
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iterator end()
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{
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return tree.end();
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}
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size_t size()
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{
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return tree.size();
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}
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bool empty()
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{
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return tree.empty();
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}
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};
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#endif //__BASE_RANGE_MAP_HH__
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@ -399,7 +399,7 @@ Trace::InstRecord::dump(ostream &outs)
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diffCcr || diffTl || diffGl || diffAsi || diffPil ||
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diffCwp || diffCansave || diffCanrestore ||
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diffOtherwin || diffCleanwin)
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&& !((staticInst->machInst & 0xE1F80000) == 0xE1F80000)) {
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&& !((staticInst->machInst & 0xC1F80000) == 0x81D00000)) {
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outs << "Differences found between M5 and Legion:";
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if (diffPC)
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outs << " [PC]";
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thread->getDTBPtr()->dumpAll();
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diffcount++;
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if (diffcount > 3)
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if (diffcount > 2)
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fatal("Differences found between Legion and M5\n");
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}
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@ -62,13 +62,15 @@ T1000::intrFrequency()
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void
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T1000::postConsoleInt()
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{
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panic("Need implementation\n");
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warn_once("Don't know what interrupt to post for console.\n");
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//panic("Need implementation\n");
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}
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void
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T1000::clearConsoleInt()
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{
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panic("Need implementation\n");
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warn_once("Don't know what interrupt to clear for console.\n");
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//panic("Need implementation\n");
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}
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void
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@ -41,7 +41,7 @@ int main()
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range_map<Addr,int>::iterator i;
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i = r.insert(RangeIn<Addr>(0,40),5);
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i = r.insert(RangeIn<Addr>(10,40),5);
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assert(i != r.end());
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i = r.insert(RangeIn<Addr>(60,90),3);
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assert(i != r.end());
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@ -52,6 +52,17 @@ int main()
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i = r.find(RangeIn(55,55));
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assert(i == r.end());
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i = r.insert(RangeIn<Addr>(0,12),1);
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assert(i == r.end());
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i = r.insert(RangeIn<Addr>(0,9),1);
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assert(i != r.end());
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i = r.find(RangeIn(20,30));
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assert(i != r.end());
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cout << i->first << " " << i->second << endl;
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}
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78
src/unittest/rangemaptest2.cc
Normal file
78
src/unittest/rangemaptest2.cc
Normal file
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@ -0,0 +1,78 @@
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/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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*/
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#include <iostream>
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#include <cassert>
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#include "sim/host.hh"
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#include "base/range_map.hh"
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using namespace std;
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int main()
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{
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range_multimap<Addr,int> r;
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range_multimap<Addr,int>::iterator i;
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std::pair<range_multimap<Addr,int>::iterator,range_multimap<Addr,int>::iterator>
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jk;
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i = r.insert(RangeIn<Addr>(10,40),5);
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assert(i != r.end());
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i = r.insert(RangeIn<Addr>(10,40),6);
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assert(i != r.end());
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i = r.insert(RangeIn<Addr>(60,90),3);
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assert(i != r.end());
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jk = r.find(RangeIn(20,30));
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assert(jk.first != r.end());
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cout << jk.first->first << " " << jk.first->second << endl;
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cout << jk.second->first << " " << jk.second->second << endl;
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i = r.insert(RangeIn<Addr>(0,3),5);
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assert(i != r.end());
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for( i = r.begin(); i != r.end(); i++)
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cout << i->first << " " << i->second << endl;
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jk = r.find(RangeIn(20,30));
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assert(jk.first != r.end());
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cout << jk.first->first << " " << jk.first->second << endl;
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cout << jk.second->first << " " << jk.second->second << endl;
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}
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