Merge zizzer.eecs.umich.edu:/bk/m5

into crampon.my.domain:/z/binkertn/research/m5/head

--HG--
extra : convert_revision : d46f23e63e4a8c6325bcdeaf6cdd76b9e6208707
This commit is contained in:
Nathan Binkert 2005-06-05 02:59:44 -04:00
commit 11f0c01207
6 changed files with 10 additions and 10 deletions

View file

@ -49,7 +49,7 @@
using namespace std; using namespace std;
extern SamplingCPU *SampCPU; extern Sampler *SampCPU;
using namespace Stats; using namespace Stats;

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@ -203,7 +203,7 @@ BaseCPU::registerExecContexts()
void void
BaseCPU::switchOut(SamplingCPU *sampler) BaseCPU::switchOut(Sampler *sampler)
{ {
panic("This CPU doesn't support sampling!"); panic("This CPU doesn't support sampling!");
} }

View file

@ -126,7 +126,7 @@ class BaseCPU : public SimObject
/// Prepare for another CPU to take over execution. When it is /// Prepare for another CPU to take over execution. When it is
/// is ready (drained pipe) it signals the sampler. /// is ready (drained pipe) it signals the sampler.
virtual void switchOut(SamplingCPU *); virtual void switchOut(Sampler *);
/// Take over execution from the given CPU. Used for warm-up and /// Take over execution from the given CPU. Used for warm-up and
/// sampling. /// sampling.

View file

@ -147,7 +147,7 @@ SimpleCPU::~SimpleCPU()
} }
void void
SimpleCPU::switchOut(SamplingCPU *s) SimpleCPU::switchOut(Sampler *s)
{ {
sampler = s; sampler = s;
if (status() == DcacheMissStall) { if (status() == DcacheMissStall) {

View file

@ -145,7 +145,7 @@ class SimpleCPU : public BaseCPU
// execution context // execution context
ExecContext *xc; ExecContext *xc;
void switchOut(SamplingCPU *s); void switchOut(Sampler *s);
void takeOverFrom(BaseCPU *oldCPU); void takeOverFrom(BaseCPU *oldCPU);
#ifdef FULL_SYSTEM #ifdef FULL_SYSTEM
@ -169,7 +169,7 @@ class SimpleCPU : public BaseCPU
// Pointer to the sampler that is telling us to switchover. // Pointer to the sampler that is telling us to switchover.
// Used to signal the completion of the pipe drain and schedule // Used to signal the completion of the pipe drain and schedule
// the next switchover // the next switchover
SamplingCPU *sampler; Sampler *sampler;
StaticInstPtr<TheISA> curStaticInst; StaticInstPtr<TheISA> curStaticInst;

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@ -30,17 +30,17 @@
# Script to simplify using rundiff on trace outputs from two # Script to simplify using rundiff on trace outputs from two
# invocations of m5. # invocations of m5.
# #
# Note that you need to enable some trace flags in the args in order # ******Note that you need to enable some trace flags in the args in order
# to do anything useful! # to do anything useful!******
# #
# If you want to pass different arguments to the two instances of m5, # If you want to pass different arguments to the two instances of m5,
# you can embed them in the simulator arguments like this: # you can embed them in the simulator arguments like this:
# #
# % tracediff "m5.opt --foo:bar=1" "m5.opt --foo:bar=2" [common args] # % tracediff "m5.opt --foo.bar=1" "m5.opt --foo.bar=2" [common args]
# #
if (@ARGV < 2) { if (@ARGV < 2) {
die "Usage: tracediff sim1 sim2 [--trace:flags=X args...]\n"; die "Usage: tracediff sim1 sim2 [--root.trace.flags=X args...]\n";
} }
# First two args are the two simulator binaries to compare # First two args are the two simulator binaries to compare