sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity

Merge zizzer.eecs.umich.edu:/bk/m5

Browse source 
into crampon.my.domain:/z/binkertn/research/m5/head

--HG--
extra : convert_revision : d46f23e63e4a8c6325bcdeaf6cdd76b9e6208707
This commit is contained in:
Nathan Binkert 2005-06-05 02:59:44 -04:00
parent e71ee12eac 550003e1b7
commit 11f0c01207
6 changed files with 10 additions and 10 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
arch/alpha/pseudo_inst.cc
View file

@ -49,7 +49,7 @@
using namespace std;
extern SamplingCPU *SampCPU;
extern Sampler *SampCPU;
using namespace Stats;

2
cpu/base.cc
View file

@ -203,7 +203,7 @@ BaseCPU::registerExecContexts()
void
BaseCPU::switchOut(SamplingCPU *sampler)
BaseCPU::switchOut(Sampler *sampler)
{
panic("This CPU doesn't support sampling!");
}

2
cpu/base.hh
View file

@ -126,7 +126,7 @@ class BaseCPU : public SimObject
/// Prepare for another CPU to take over execution. When it is
/// is ready (drained pipe) it signals the sampler.
virtual void switchOut(SamplingCPU *);
virtual void switchOut(Sampler *);
/// Take over execution from the given CPU. Used for warm-up and
/// sampling.

2
cpu/simple/cpu.cc
View file

@ -147,7 +147,7 @@ SimpleCPU::~SimpleCPU()
}
void
SimpleCPU::switchOut(SamplingCPU *s)
SimpleCPU::switchOut(Sampler *s)
{
sampler = s;
if (status() == DcacheMissStall) {

4
cpu/simple/cpu.hh
View file

@ -145,7 +145,7 @@ class SimpleCPU : public BaseCPU
// execution context
ExecContext *xc;
void switchOut(SamplingCPU *s);
void switchOut(Sampler *s);
void takeOverFrom(BaseCPU *oldCPU);
#ifdef FULL_SYSTEM
@ -169,7 +169,7 @@ class SimpleCPU : public BaseCPU
// Pointer to the sampler that is telling us to switchover.
// Used to signal the completion of the pipe drain and schedule
// the next switchover
SamplingCPU *sampler;
Sampler *sampler;
StaticInstPtr<TheISA> curStaticInst;

8
util/tracediff
View file

@ -30,17 +30,17 @@
# Script to simplify using rundiff on trace outputs from two
# invocations of m5.
#
# Note that you need to enable some trace flags in the args in order
# to do anything useful!
# ******Note that you need to enable some trace flags in the args in order
# to do anything useful!******
#
# If you want to pass different arguments to the two instances of m5,
# you can embed them in the simulator arguments like this:
#
# % tracediff "m5.opt --foo:bar=1" "m5.opt --foo:bar=2" [common args]
# % tracediff "m5.opt --foo.bar=1" "m5.opt --foo.bar=2" [common args]
#
if (@ARGV < 2) {
die "Usage: tracediff sim1 sim2 [--trace:flags=X args...]\n";
die "Usage: tracediff sim1 sim2 [--root.trace.flags=X args...]\n";
}
# First two args are the two simulator binaries to compare