ruby: changes how Topologies are created
Instead of just passing a list of controllers to the makeTopology function in src/mem/ruby/network/topologies/<Topo>.py we pass in a function pointer which knows how to make the topology, possibly with some extra state set in the configs/ruby/<protocol>.py file. Thus, we can move all of the files from network/topologies to configs/topologies. A new class BaseTopology is added which all topologies in configs/topologies must inheirit from and follow its API. --HG-- rename : src/mem/ruby/network/topologies/Crossbar.py => configs/topologies/Crossbar.py rename : src/mem/ruby/network/topologies/Mesh.py => configs/topologies/Mesh.py rename : src/mem/ruby/network/topologies/MeshDirCorners.py => configs/topologies/MeshDirCorners.py rename : src/mem/ruby/network/topologies/Pt2Pt.py => configs/topologies/Pt2Pt.py rename : src/mem/ruby/network/topologies/Torus.py => configs/topologies/Torus.py
This commit is contained in:
parent
745274cbd4
commit
11b725c19d
26 changed files with 663 additions and 431 deletions
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@ -35,6 +35,7 @@ from m5.util import addToPath
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import os, optparse, sys
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import os, optparse, sys
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addToPath('../common')
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addToPath('../common')
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addToPath('../ruby')
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addToPath('../ruby')
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addToPath('../topologies')
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import Options
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import Options
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import Ruby
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import Ruby
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@ -40,6 +40,7 @@ from m5.util import addToPath, fatal
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addToPath('../common')
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addToPath('../common')
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addToPath('../ruby')
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addToPath('../ruby')
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addToPath('../topologies')
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import Ruby
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import Ruby
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@ -35,6 +35,7 @@ from m5.util import addToPath
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import os, optparse, sys
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import os, optparse, sys
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addToPath('../common')
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addToPath('../common')
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addToPath('../ruby')
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addToPath('../ruby')
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addToPath('../topologies')
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import Options
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import Options
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import Ruby
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import Ruby
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@ -35,6 +35,7 @@ from m5.util import addToPath
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import os, optparse, sys
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import os, optparse, sys
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addToPath('../common')
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addToPath('../common')
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addToPath('../ruby')
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addToPath('../ruby')
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addToPath('../topologies')
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import Options
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import Options
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import Ruby
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import Ruby
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@ -35,6 +35,7 @@ from m5.util import addToPath
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import os, optparse, sys
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import os, optparse, sys
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addToPath('../common')
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addToPath('../common')
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addToPath('../ruby')
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addToPath('../ruby')
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addToPath('../topologies')
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import Options
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import Options
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import Ruby
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import Ruby
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@ -52,6 +52,7 @@ from m5.util import addToPath, fatal
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addToPath('../common')
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addToPath('../common')
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addToPath('../ruby')
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addToPath('../ruby')
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addToPath('../topologies')
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import Options
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import Options
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import Ruby
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import Ruby
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@ -31,6 +31,7 @@ import math
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import m5
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import m5
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from m5.objects import *
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from m5.objects import *
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from m5.defines import buildEnv
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from m5.defines import buildEnv
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from Ruby import create_topology
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#
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#
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# Note: the L1 Cache latency is only used by the sequencer on fast path hits
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# Note: the L1 Cache latency is only used by the sequencer on fast path hits
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@ -185,4 +186,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
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dir_cntrl_nodes + \
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dir_cntrl_nodes + \
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dma_cntrl_nodes
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dma_cntrl_nodes
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return (cpu_sequencers, dir_cntrl_nodes, all_cntrls)
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topology = create_topology(all_cntrls, options)
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return (cpu_sequencers, dir_cntrl_nodes, topology)
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@ -31,6 +31,7 @@ import math
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import m5
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import m5
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from m5.objects import *
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from m5.objects import *
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from m5.defines import buildEnv
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from m5.defines import buildEnv
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from Ruby import create_topology
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#
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#
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# Note: the cache latency is only used by the sequencer on fast path hits
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# Note: the cache latency is only used by the sequencer on fast path hits
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@ -155,4 +156,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
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all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes
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all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes
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return (cpu_sequencers, dir_cntrl_nodes, all_cntrls)
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topology = create_topology(all_cntrls, options)
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return (cpu_sequencers, dir_cntrl_nodes, topology)
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@ -31,6 +31,7 @@ import math
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import m5
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import m5
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from m5.objects import *
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from m5.objects import *
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from m5.defines import buildEnv
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from m5.defines import buildEnv
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from Ruby import create_topology
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#
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#
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# Note: the L1 Cache latency is only used by the sequencer on fast path hits
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# Note: the L1 Cache latency is only used by the sequencer on fast path hits
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@ -182,4 +183,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
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dir_cntrl_nodes + \
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dir_cntrl_nodes + \
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dma_cntrl_nodes
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dma_cntrl_nodes
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return (cpu_sequencers, dir_cntrl_nodes, all_cntrls)
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topology = create_topology(all_cntrls, options)
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return (cpu_sequencers, dir_cntrl_nodes, topology)
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@ -31,6 +31,7 @@ import math
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import m5
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import m5
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from m5.objects import *
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from m5.objects import *
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from m5.defines import buildEnv
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from m5.defines import buildEnv
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from Ruby import create_topology
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#
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#
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# Note: the L1 Cache latency is only used by the sequencer on fast path hits
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# Note: the L1 Cache latency is only used by the sequencer on fast path hits
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@ -206,4 +207,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
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dir_cntrl_nodes + \
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dir_cntrl_nodes + \
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dma_cntrl_nodes
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dma_cntrl_nodes
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return (cpu_sequencers, dir_cntrl_nodes, all_cntrls)
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topology = create_topology(all_cntrls, options)
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return (cpu_sequencers, dir_cntrl_nodes, topology)
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@ -31,6 +31,7 @@ import math
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import m5
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import m5
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from m5.objects import *
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from m5.objects import *
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from m5.defines import buildEnv
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from m5.defines import buildEnv
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from Ruby import create_topology
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#
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#
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# Note: the L1 Cache latency is only used by the sequencer on fast path hits
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# Note: the L1 Cache latency is only used by the sequencer on fast path hits
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@ -219,4 +220,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
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all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes
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all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes
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return (cpu_sequencers, dir_cntrl_nodes, all_cntrls)
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topology = create_topology(all_cntrls, options)
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return (cpu_sequencers, dir_cntrl_nodes, topology)
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@ -31,6 +31,7 @@ import m5
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from m5.objects import *
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from m5.objects import *
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from m5.defines import buildEnv
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from m5.defines import buildEnv
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from m5.util import addToPath
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from m5.util import addToPath
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from Ruby import create_topology
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#
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#
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# Note: the cache latency is only used by the sequencer on fast path hits
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# Note: the cache latency is only used by the sequencer on fast path hits
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@ -135,4 +136,6 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
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all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes
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all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes
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return (cpu_sequencers, dir_cntrl_nodes, all_cntrls)
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topology = create_topology(all_cntrls, options)
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return (cpu_sequencers, dir_cntrl_nodes, topology)
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@ -79,6 +79,16 @@ def define_options(parser):
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exec "import %s" % protocol
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exec "import %s" % protocol
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eval("%s.define_options(parser)" % protocol)
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eval("%s.define_options(parser)" % protocol)
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def create_topology(controllers, options):
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""" Called from create_system in configs/ruby/<protocol>.py
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Must return an object which is a subclass of BaseTopology
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found in configs/topologies/BaseTopology.py
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This is a wrapper for the legacy topologies.
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"""
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exec "import %s as Topo" % options.topology
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topology = eval("Topo.%s(controllers)" % options.topology)
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return topology
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def create_system(options, system, piobus = None, dma_ports = []):
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def create_system(options, system, piobus = None, dma_ports = []):
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system.ruby = RubySystem(clock = options.clock,
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system.ruby = RubySystem(clock = options.clock,
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@ -89,7 +99,7 @@ def create_system(options, system, piobus = None, dma_ports = []):
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protocol = buildEnv['PROTOCOL']
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protocol = buildEnv['PROTOCOL']
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exec "import %s" % protocol
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exec "import %s" % protocol
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try:
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try:
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(cpu_sequencers, dir_cntrls, all_cntrls) = \
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(cpu_sequencers, dir_cntrls, topology) = \
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eval("%s.create_system(options, system, piobus, dma_ports, ruby)"
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eval("%s.create_system(options, system, piobus, dma_ports, ruby)"
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% protocol)
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% protocol)
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except:
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except:
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@ -128,17 +138,17 @@ def create_system(options, system, piobus = None, dma_ports = []):
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class RouterClass(BasicRouter): pass
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class RouterClass(BasicRouter): pass
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#
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#
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# Important: the topology must be created before the network and after the
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# Important: the topology must be instantiated before the network and after
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# controllers.
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# the controllers. Hence the separation between topology definition and
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# instantiation. TopologyCreator is in src/mem/ruby/network/topologies/.
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#
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#
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exec "import %s" % options.topology
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from TopologyCreator import instantiateTopology
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try:
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try:
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net_topology = eval("%s.makeTopology(all_cntrls, options, \
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net_topology = instantiateTopology(topology, options, \
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IntLinkClass, ExtLinkClass, \
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IntLinkClass, ExtLinkClass, \
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RouterClass)" \
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RouterClass)
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% options.topology)
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except:
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except:
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print "Error: could not create topology %s" % options.topology
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print "Error: could not make topology %s" % options.topology
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raise
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raise
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if options.network_fault_model:
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if options.network_fault_model:
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51
configs/topologies/BaseTopology.py
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51
configs/topologies/BaseTopology.py
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# Copyright (c) 2012 Advanced Micro Devices, Inc.
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Jason Power
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class BaseTopology(object):
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description = "BaseTopology"
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def __init__(self):
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""" When overriding place any objects created in
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configs/ruby/<protocol>.py that are needed in
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makeTopology (below) here. The minimum is usually
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all of the controllers created in the above file.
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"""
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def makeTopology(self, options, IntLink, ExtLink, Router):
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""" Called from src/mem/ruby/network/topologies/TopologyCreatory.py
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The return value is ( list(Router), list(IntLink), list(ExtLink))
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The API of this function cannot change when subclassing!!
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Any additional information needed to create this topology should
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be passed into the constructor when it's instantiated in
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configs/ruby/<protocol>.py
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"""
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print "BaseTopology should have been overridden in a sub class!!"
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import sys
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sys.exit(1)
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117
configs/topologies/Cluster.py
Normal file
117
configs/topologies/Cluster.py
Normal file
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# Copyright (c) 2012 Advanced Micro Devices, Inc.
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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|
# notice, this list of conditions and the following disclaimer in the
|
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|
# documentation and/or other materials provided with the distribution;
|
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
|
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Jason Power
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from BaseTopology import BaseTopology
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class Cluster(BaseTopology):
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""" A cluster is a group of nodes which are all one hop from eachother
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Clusters can also contain other clusters
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When creating this kind of topology, return a single cluster (usually
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the root cluster) from create_system in configs/ruby/<protocol>.py
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"""
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_num_int_links = 0
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_num_ext_links = 0
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_num_routers = 0
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# Below methods for auto counting
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@classmethod
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def num_int_links(cls):
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cls._num_int_links += 1
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return cls._num_int_links - 1
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@classmethod
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def num_ext_links(cls):
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cls._num_ext_links += 1
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return cls._num_ext_links - 1
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@classmethod
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def num_routers(cls):
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cls._num_routers += 1
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return cls._num_routers - 1
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def __init__(self, intBW=0, extBW=0, intLatency=0, extLatency=0):
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""" internalBandwidth is bandwidth of all links within the cluster
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externalBandwidth is bandwidth from this cluster to any cluster
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connecting to it.
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internal/externalLatency are similar
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**** When creating a cluster with sub-clusters, the sub-cluster
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external bandwidth overrides the internal bandwidth of the
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super cluster
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"""
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self.nodes = []
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self.router = None # created in makeTopology
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self.intBW = intBW
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self.extBW = extBW
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self.intLatency = intLatency
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self.extLatency = extLatency
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def add(self, node):
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self.nodes.append(node)
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|
|
||||||
|
def makeTopology(self, options, IntLink, ExtLink, Router):
|
||||||
|
""" Recursively make all of the links and routers
|
||||||
|
"""
|
||||||
|
routers = []
|
||||||
|
int_links = []
|
||||||
|
ext_links = []
|
||||||
|
|
||||||
|
# make a router to connect all of the nodes
|
||||||
|
self.router = Router(router_id=self.num_routers())
|
||||||
|
routers.append(self.router)
|
||||||
|
for node in self.nodes:
|
||||||
|
if type(node) == Cluster:
|
||||||
|
subRouters, subIntLinks, subExtLinks = node.makeTopology(options, IntLink, ExtLink, Router)
|
||||||
|
routers += subRouters
|
||||||
|
int_links += subIntLinks
|
||||||
|
ext_links += subExtLinks
|
||||||
|
|
||||||
|
# connect this cluster to the router
|
||||||
|
link = IntLink(link_id=self.num_int_links(), node_a=self.router, node_b=node.router)
|
||||||
|
if node.extBW:
|
||||||
|
link.bandwidth_factor = node.extBW
|
||||||
|
elif self.intBW: # if there is an interanl b/w for this node and no ext b/w to override
|
||||||
|
link.bandwidth_factor = self.intBW
|
||||||
|
|
||||||
|
if node.extLatency:
|
||||||
|
link.latency = node.extLatency
|
||||||
|
elif self.intLatency:
|
||||||
|
link.latency = self.intLatency
|
||||||
|
|
||||||
|
int_links.append(link)
|
||||||
|
else:
|
||||||
|
# node is just a controller connect it to the router via a ext_link
|
||||||
|
link = ExtLink(link_id=self.num_ext_links(), ext_node=node, int_node=self.router)
|
||||||
|
if self.intBW:
|
||||||
|
link.bandwidth_factor = self.intBW
|
||||||
|
if self.intLatency:
|
||||||
|
link.latency = self.intLatency
|
||||||
|
|
||||||
|
ext_links.append(link)
|
||||||
|
|
||||||
|
return routers, int_links, ext_links
|
||||||
|
|
|
@ -29,23 +29,28 @@
|
||||||
from m5.params import *
|
from m5.params import *
|
||||||
from m5.objects import *
|
from m5.objects import *
|
||||||
|
|
||||||
class Crossbar(Topology):
|
from BaseTopology import BaseTopology
|
||||||
|
|
||||||
|
class Crossbar(BaseTopology):
|
||||||
description='Crossbar'
|
description='Crossbar'
|
||||||
|
|
||||||
def makeTopology(nodes, options, IntLink, ExtLink, Router):
|
def __init__(self, controllers):
|
||||||
|
self.nodes = controllers
|
||||||
|
|
||||||
|
def makeTopology(self, options, IntLink, ExtLink, Router):
|
||||||
# Create an individual router for each controller plus one more for the
|
# Create an individual router for each controller plus one more for the
|
||||||
# centralized crossbar. The large numbers of routers are needed because
|
# centralized crossbar. The large numbers of routers are needed because
|
||||||
# external links do not model outgoing bandwidth in the simple network, but
|
# external links do not model outgoing bandwidth in the simple network, but
|
||||||
# internal links do.
|
# internal links do.
|
||||||
cb = Crossbar()
|
|
||||||
cb.routers = [Router(router_id=i) for i in range(len(nodes)+1)]
|
|
||||||
cb.ext_links = [ExtLink(link_id=i, ext_node=n, int_node=cb.routers[i])
|
|
||||||
for (i, n) in enumerate(nodes)]
|
|
||||||
link_count = len(nodes)
|
|
||||||
xbar = cb.routers[len(nodes)] # the crossbar router is the last router created
|
|
||||||
cb.int_links = [IntLink(link_id=(link_count+i),
|
|
||||||
node_a=cb.routers[i], node_b=xbar)
|
|
||||||
for i in range(len(nodes))]
|
|
||||||
return cb
|
|
||||||
|
|
||||||
|
routers = [Router(router_id=i) for i in range(len(self.nodes)+1)]
|
||||||
|
ext_links = [ExtLink(link_id=i, ext_node=n, int_node=routers[i])
|
||||||
|
for (i, n) in enumerate(self.nodes)]
|
||||||
|
link_count = len(self.nodes)
|
||||||
|
xbar = routers[len(self.nodes)] # the crossbar router is the last router created
|
||||||
|
int_links = [IntLink(link_id=(link_count+i),
|
||||||
|
node_a=routers[i], node_b=xbar)
|
||||||
|
for i in range(len(self.nodes))]
|
||||||
|
|
||||||
|
return routers, int_links, ext_links
|
||||||
|
|
114
configs/topologies/Mesh.py
Normal file
114
configs/topologies/Mesh.py
Normal file
|
@ -0,0 +1,114 @@
|
||||||
|
# Copyright (c) 2010 Advanced Micro Devices, Inc.
|
||||||
|
# All rights reserved.
|
||||||
|
#
|
||||||
|
# Redistribution and use in source and binary forms, with or without
|
||||||
|
# modification, are permitted provided that the following conditions are
|
||||||
|
# met: redistributions of source code must retain the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer;
|
||||||
|
# redistributions in binary form must reproduce the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer in the
|
||||||
|
# documentation and/or other materials provided with the distribution;
|
||||||
|
# neither the name of the copyright holders nor the names of its
|
||||||
|
# contributors may be used to endorse or promote products derived from
|
||||||
|
# this software without specific prior written permission.
|
||||||
|
#
|
||||||
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
#
|
||||||
|
# Authors: Brad Beckmann
|
||||||
|
|
||||||
|
from m5.params import *
|
||||||
|
from m5.objects import *
|
||||||
|
|
||||||
|
from BaseTopology import BaseTopology
|
||||||
|
|
||||||
|
class Mesh(BaseTopology):
|
||||||
|
description='Mesh'
|
||||||
|
|
||||||
|
def __init__(self, controllers):
|
||||||
|
self.nodes = controllers
|
||||||
|
|
||||||
|
# Makes a generic mesh assuming an equal number of cache and directory cntrls
|
||||||
|
|
||||||
|
def makeTopology(self, options, IntLink, ExtLink, Router):
|
||||||
|
nodes = self.nodes
|
||||||
|
|
||||||
|
num_routers = options.num_cpus
|
||||||
|
num_rows = options.mesh_rows
|
||||||
|
|
||||||
|
# There must be an evenly divisible number of cntrls to routers
|
||||||
|
# Also, obviously the number or rows must be <= the number of routers
|
||||||
|
cntrls_per_router, remainder = divmod(len(nodes), num_routers)
|
||||||
|
assert(num_rows <= num_routers)
|
||||||
|
num_columns = int(num_routers / num_rows)
|
||||||
|
assert(num_columns * num_rows == num_routers)
|
||||||
|
|
||||||
|
# Create the routers in the mesh
|
||||||
|
routers = [Router(router_id=i) for i in range(num_routers)]
|
||||||
|
|
||||||
|
# link counter to set unique link ids
|
||||||
|
link_count = 0
|
||||||
|
|
||||||
|
# Add all but the remainder nodes to the list of nodes to be uniformly
|
||||||
|
# distributed across the network.
|
||||||
|
network_nodes = []
|
||||||
|
remainder_nodes = []
|
||||||
|
for node_index in xrange(len(nodes)):
|
||||||
|
if node_index < (len(nodes) - remainder):
|
||||||
|
network_nodes.append(nodes[node_index])
|
||||||
|
else:
|
||||||
|
remainder_nodes.append(nodes[node_index])
|
||||||
|
|
||||||
|
# Connect each node to the appropriate router
|
||||||
|
ext_links = []
|
||||||
|
for (i, n) in enumerate(network_nodes):
|
||||||
|
cntrl_level, router_id = divmod(i, num_routers)
|
||||||
|
assert(cntrl_level < cntrls_per_router)
|
||||||
|
ext_links.append(ExtLink(link_id=link_count, ext_node=n,
|
||||||
|
int_node=routers[router_id]))
|
||||||
|
link_count += 1
|
||||||
|
|
||||||
|
# Connect the remainding nodes to router 0. These should only be
|
||||||
|
# DMA nodes.
|
||||||
|
for (i, node) in enumerate(remainder_nodes):
|
||||||
|
assert(node.type == 'DMA_Controller')
|
||||||
|
assert(i < remainder)
|
||||||
|
ext_links.append(ExtLink(link_id=link_count, ext_node=node,
|
||||||
|
int_node=routers[0]))
|
||||||
|
link_count += 1
|
||||||
|
|
||||||
|
# Create the mesh links. First row (east-west) links then column
|
||||||
|
# (north-south) links
|
||||||
|
int_links = []
|
||||||
|
for row in xrange(num_rows):
|
||||||
|
for col in xrange(num_columns):
|
||||||
|
if (col + 1 < num_columns):
|
||||||
|
east_id = col + (row * num_columns)
|
||||||
|
west_id = (col + 1) + (row * num_columns)
|
||||||
|
int_links.append(IntLink(link_id=link_count,
|
||||||
|
node_a=routers[east_id],
|
||||||
|
node_b=routers[west_id],
|
||||||
|
weight=1))
|
||||||
|
link_count += 1
|
||||||
|
|
||||||
|
for col in xrange(num_columns):
|
||||||
|
for row in xrange(num_rows):
|
||||||
|
if (row + 1 < num_rows):
|
||||||
|
north_id = col + (row * num_columns)
|
||||||
|
south_id = col + ((row + 1) * num_columns)
|
||||||
|
int_links.append(IntLink(link_id=link_count,
|
||||||
|
node_a=routers[north_id],
|
||||||
|
node_b=routers[south_id],
|
||||||
|
weight=2))
|
||||||
|
link_count += 1
|
||||||
|
|
||||||
|
return routers, int_links, ext_links
|
134
configs/topologies/MeshDirCorners.py
Normal file
134
configs/topologies/MeshDirCorners.py
Normal file
|
@ -0,0 +1,134 @@
|
||||||
|
# Copyright (c) 2010 Advanced Micro Devices, Inc.
|
||||||
|
# All rights reserved.
|
||||||
|
#
|
||||||
|
# Redistribution and use in source and binary forms, with or without
|
||||||
|
# modification, are permitted provided that the following conditions are
|
||||||
|
# met: redistributions of source code must retain the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer;
|
||||||
|
# redistributions in binary form must reproduce the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer in the
|
||||||
|
# documentation and/or other materials provided with the distribution;
|
||||||
|
# neither the name of the copyright holders nor the names of its
|
||||||
|
# contributors may be used to endorse or promote products derived from
|
||||||
|
# this software without specific prior written permission.
|
||||||
|
#
|
||||||
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
#
|
||||||
|
# Authors: Brad Beckmann
|
||||||
|
|
||||||
|
from m5.params import *
|
||||||
|
from m5.objects import *
|
||||||
|
|
||||||
|
from BaseTopology import BaseTopology
|
||||||
|
|
||||||
|
class MeshDirCorners(BaseTopology):
|
||||||
|
description='MeshDirCorners'
|
||||||
|
|
||||||
|
def __init__(self, controllers):
|
||||||
|
self.nodes = controllers
|
||||||
|
|
||||||
|
# This file contains a special network creation function. This
|
||||||
|
# networks is not general and will only work with specific system
|
||||||
|
# configurations. The network specified is similar to GEMS old file
|
||||||
|
# specified network.
|
||||||
|
|
||||||
|
def makeTopology(self, options, IntLink, ExtLink, Router):
|
||||||
|
nodes = self.nodes
|
||||||
|
|
||||||
|
num_routers = options.num_cpus
|
||||||
|
num_rows = options.mesh_rows
|
||||||
|
|
||||||
|
# First determine which nodes are cache cntrls vs. dirs vs. dma
|
||||||
|
cache_nodes = []
|
||||||
|
dir_nodes = []
|
||||||
|
dma_nodes = []
|
||||||
|
for node in nodes:
|
||||||
|
if node.type == 'L1Cache_Controller' or \
|
||||||
|
node.type == 'L2Cache_Controller':
|
||||||
|
cache_nodes.append(node)
|
||||||
|
elif node.type == 'Directory_Controller':
|
||||||
|
dir_nodes.append(node)
|
||||||
|
elif node.type == 'DMA_Controller':
|
||||||
|
dma_nodes.append(node)
|
||||||
|
|
||||||
|
# Obviously the number or rows must be <= the number of routers
|
||||||
|
# and evenly divisible. Also the number of caches must be a
|
||||||
|
# multiple of the number of routers and the number of directories
|
||||||
|
# must be four.
|
||||||
|
assert(num_rows <= num_routers)
|
||||||
|
num_columns = int(num_routers / num_rows)
|
||||||
|
assert(num_columns * num_rows == num_routers)
|
||||||
|
caches_per_router, remainder = divmod(len(cache_nodes), num_routers)
|
||||||
|
assert(remainder == 0)
|
||||||
|
assert(len(dir_nodes) == 4)
|
||||||
|
|
||||||
|
# Create the routers in the mesh
|
||||||
|
routers = [Router(router_id=i) for i in range(num_routers)]
|
||||||
|
|
||||||
|
# link counter to set unique link ids
|
||||||
|
link_count = 0
|
||||||
|
|
||||||
|
# Connect each cache controller to the appropriate router
|
||||||
|
ext_links = []
|
||||||
|
for (i, n) in enumerate(cache_nodes):
|
||||||
|
cntrl_level, router_id = divmod(i, num_routers)
|
||||||
|
assert(cntrl_level < caches_per_router)
|
||||||
|
ext_links.append(ExtLink(link_id=link_count, ext_node=n,
|
||||||
|
int_node=routers[router_id]))
|
||||||
|
link_count += 1
|
||||||
|
|
||||||
|
# Connect the dir nodes to the corners.
|
||||||
|
ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[0],
|
||||||
|
int_node=routers[0]))
|
||||||
|
link_count += 1
|
||||||
|
ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[1],
|
||||||
|
int_node=routers[num_columns - 1]))
|
||||||
|
link_count += 1
|
||||||
|
ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[2],
|
||||||
|
int_node=routers[num_routers - num_columns]))
|
||||||
|
link_count += 1
|
||||||
|
ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[3],
|
||||||
|
int_node=routers[num_routers - 1]))
|
||||||
|
link_count += 1
|
||||||
|
|
||||||
|
# Connect the dma nodes to router 0. These should only be DMA nodes.
|
||||||
|
for (i, node) in enumerate(dma_nodes):
|
||||||
|
assert(node.type == 'DMA_Controller')
|
||||||
|
ext_links.append(ExtLink(link_id=link_count, ext_node=node, int_node=routers[0]))
|
||||||
|
|
||||||
|
# Create the mesh links. First row (east-west) links then column
|
||||||
|
# (north-south) links
|
||||||
|
int_links = []
|
||||||
|
for row in xrange(num_rows):
|
||||||
|
for col in xrange(num_columns):
|
||||||
|
if (col + 1 < num_columns):
|
||||||
|
east_id = col + (row * num_columns)
|
||||||
|
west_id = (col + 1) + (row * num_columns)
|
||||||
|
int_links.append(IntLink(link_id=link_count,
|
||||||
|
node_a=routers[east_id],
|
||||||
|
node_b=routers[west_id],
|
||||||
|
weight=1))
|
||||||
|
link_count += 1
|
||||||
|
|
||||||
|
for col in xrange(num_columns):
|
||||||
|
for row in xrange(num_rows):
|
||||||
|
if (row + 1 < num_rows):
|
||||||
|
north_id = col + (row * num_columns)
|
||||||
|
south_id = col + ((row + 1) * num_columns)
|
||||||
|
int_links.append(IntLink(link_id=link_count,
|
||||||
|
node_a=routers[north_id],
|
||||||
|
node_b=routers[south_id],
|
||||||
|
weight=2))
|
||||||
|
link_count += 1
|
||||||
|
|
||||||
|
return routers, int_links, ext_links
|
|
@ -31,14 +31,20 @@
|
||||||
from m5.params import *
|
from m5.params import *
|
||||||
from m5.objects import *
|
from m5.objects import *
|
||||||
|
|
||||||
class Pt2Pt(Topology):
|
from BaseTopology import BaseTopology
|
||||||
|
|
||||||
|
class Pt2Pt(BaseTopology):
|
||||||
description='Pt2Pt'
|
description='Pt2Pt'
|
||||||
|
|
||||||
def makeTopology(nodes, options, IntLink, ExtLink, Router):
|
def __init__(self, controllers):
|
||||||
|
self.nodes = controllers
|
||||||
|
|
||||||
|
def makeTopology(self, options, IntLink, ExtLink, Router):
|
||||||
|
nodes = self.nodes
|
||||||
# Create an individual router for each controller, and connect all to all.
|
# Create an individual router for each controller, and connect all to all.
|
||||||
pt2pt = Pt2Pt()
|
|
||||||
pt2pt.routers = [Router(router_id=i) for i in range(len(nodes))]
|
routers = [Router(router_id=i) for i in range(len(nodes))]
|
||||||
ext_links = [ExtLink(link_id=i, ext_node=n, int_node=pt2pt.routers[i])
|
ext_links = [ExtLink(link_id=i, ext_node=n, int_node=routers[i])
|
||||||
for (i, n) in enumerate(nodes)]
|
for (i, n) in enumerate(nodes)]
|
||||||
link_count = len(nodes)
|
link_count = len(nodes)
|
||||||
|
|
||||||
|
@ -48,10 +54,7 @@ def makeTopology(nodes, options, IntLink, ExtLink, Router):
|
||||||
if (i != j):
|
if (i != j):
|
||||||
link_count += 1
|
link_count += 1
|
||||||
int_links.append(IntLink(link_id=link_count,
|
int_links.append(IntLink(link_id=link_count,
|
||||||
node_a=pt2pt.routers[i],
|
node_a=routers[i],
|
||||||
node_b=pt2pt.routers[j]))
|
node_b=routers[j]))
|
||||||
|
|
||||||
pt2pt.ext_links = ext_links
|
return routers, int_links, ext_links
|
||||||
pt2pt.int_links = int_links
|
|
||||||
|
|
||||||
return pt2pt
|
|
126
configs/topologies/Torus.py
Normal file
126
configs/topologies/Torus.py
Normal file
|
@ -0,0 +1,126 @@
|
||||||
|
# Copyright (c) 2011 Advanced Micro Devices, Inc.
|
||||||
|
# 2011 Massachusetts Institute of Technology
|
||||||
|
# All rights reserved.
|
||||||
|
#
|
||||||
|
# Redistribution and use in source and binary forms, with or without
|
||||||
|
# modification, are permitted provided that the following conditions are
|
||||||
|
# met: redistributions of source code must retain the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer;
|
||||||
|
# redistributions in binary form must reproduce the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer in the
|
||||||
|
# documentation and/or other materials provided with the distribution;
|
||||||
|
# neither the name of the copyright holders nor the names of its
|
||||||
|
# contributors may be used to endorse or promote products derived from
|
||||||
|
# this software without specific prior written permission.
|
||||||
|
#
|
||||||
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
#
|
||||||
|
# Authors: Brad Beckmann
|
||||||
|
# Tushar Krishna
|
||||||
|
|
||||||
|
from m5.params import *
|
||||||
|
from m5.objects import *
|
||||||
|
|
||||||
|
from BaseTopology import BaseTopology
|
||||||
|
|
||||||
|
class Torus(BaseTopology):
|
||||||
|
description='Torus'
|
||||||
|
|
||||||
|
def __init__(self, controllers):
|
||||||
|
self.nodes = controllers
|
||||||
|
|
||||||
|
# Makes a generic torus assuming an equal number of cache and directory cntrls
|
||||||
|
# Assuming a folded-torus on-chip layout (as shown on gem5 wiki).
|
||||||
|
# All links (including the wrap-around ones) are of equal length, double that
|
||||||
|
# of a mesh. Thus, each link is assigned a latency of 2 cycles.
|
||||||
|
|
||||||
|
def makeTopology(self, options, IntLink, ExtLink, Router):
|
||||||
|
nodes = self.nodes
|
||||||
|
|
||||||
|
num_routers = options.num_cpus
|
||||||
|
num_rows = options.mesh_rows
|
||||||
|
|
||||||
|
# There must be an evenly divisible number of cntrls to routers
|
||||||
|
# Also, obviously the number or rows must be <= the number of routers
|
||||||
|
cntrls_per_router, remainder = divmod(len(nodes), num_routers)
|
||||||
|
assert(num_rows <= num_routers)
|
||||||
|
num_columns = int(num_routers / num_rows)
|
||||||
|
assert(num_columns * num_rows == num_routers)
|
||||||
|
|
||||||
|
# Create the routers in the torus
|
||||||
|
routers = [Router(router_id=i) for i in range(num_routers)]
|
||||||
|
|
||||||
|
# link counter to set unique link ids
|
||||||
|
link_count = 0
|
||||||
|
|
||||||
|
# Add all but the remainder nodes to the list of nodes to be uniformly
|
||||||
|
# distributed across the network.
|
||||||
|
network_nodes = []
|
||||||
|
remainder_nodes = []
|
||||||
|
for node_index in xrange(len(nodes)):
|
||||||
|
if node_index < (len(nodes) - remainder):
|
||||||
|
network_nodes.append(nodes[node_index])
|
||||||
|
else:
|
||||||
|
remainder_nodes.append(nodes[node_index])
|
||||||
|
|
||||||
|
# Connect each node to the appropriate router
|
||||||
|
ext_links = []
|
||||||
|
for (i, n) in enumerate(network_nodes):
|
||||||
|
cntrl_level, router_id = divmod(i, num_routers)
|
||||||
|
assert(cntrl_level < cntrls_per_router)
|
||||||
|
ext_links.append(ExtLink(link_id=link_count, ext_node=n,
|
||||||
|
int_node=routers[router_id]))
|
||||||
|
link_count += 1
|
||||||
|
|
||||||
|
# Connect the remainding nodes to router 0. These should only be
|
||||||
|
# DMA nodes.
|
||||||
|
for (i, node) in enumerate(remainder_nodes):
|
||||||
|
assert(node.type == 'DMA_Controller')
|
||||||
|
assert(i < remainder)
|
||||||
|
ext_links.append(ExtLink(link_id=link_count, ext_node=node,
|
||||||
|
int_node=routers[0]))
|
||||||
|
link_count += 1
|
||||||
|
|
||||||
|
# Create the torus links. First row (east-west) links then column
|
||||||
|
# (north-south) links
|
||||||
|
# column links are given higher weights to implement XY routing
|
||||||
|
int_links = []
|
||||||
|
for row in xrange(num_rows):
|
||||||
|
for col in xrange(num_columns):
|
||||||
|
west_id = col + (row * num_columns)
|
||||||
|
if (col + 1 < num_columns):
|
||||||
|
east_id = (col + 1) + (row * num_columns)
|
||||||
|
else:
|
||||||
|
east_id = (row * num_columns)
|
||||||
|
int_links.append(IntLink(link_id=link_count,
|
||||||
|
node_a=routers[east_id],
|
||||||
|
node_b=routers[west_id],
|
||||||
|
latency=2,
|
||||||
|
weight=1))
|
||||||
|
link_count += 1
|
||||||
|
|
||||||
|
for col in xrange(num_columns):
|
||||||
|
for row in xrange(num_rows):
|
||||||
|
north_id = col + (row * num_columns)
|
||||||
|
if (row + 1 < num_rows):
|
||||||
|
south_id = col + ((row + 1) * num_columns)
|
||||||
|
else:
|
||||||
|
south_id = col
|
||||||
|
int_links.append(IntLink(link_id=link_count,
|
||||||
|
node_a=routers[north_id],
|
||||||
|
node_b=routers[south_id],
|
||||||
|
latency=2,
|
||||||
|
weight=2))
|
||||||
|
link_count += 1
|
||||||
|
|
||||||
|
return routers, int_links, ext_links
|
|
@ -1,114 +0,0 @@
|
||||||
# Copyright (c) 2010 Advanced Micro Devices, Inc.
|
|
||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
#
|
|
||||||
# Authors: Brad Beckmann
|
|
||||||
|
|
||||||
from m5.params import *
|
|
||||||
from m5.objects import *
|
|
||||||
|
|
||||||
class Mesh(Topology):
|
|
||||||
description='Mesh'
|
|
||||||
|
|
||||||
# Makes a generic mesh assuming an equal number of cache and directory cntrls
|
|
||||||
|
|
||||||
def makeTopology(nodes, options, IntLink, ExtLink, Router):
|
|
||||||
|
|
||||||
num_routers = options.num_cpus
|
|
||||||
num_rows = options.mesh_rows
|
|
||||||
|
|
||||||
# There must be an evenly divisible number of cntrls to routers
|
|
||||||
# Also, obviously the number or rows must be <= the number of routers
|
|
||||||
cntrls_per_router, remainder = divmod(len(nodes), num_routers)
|
|
||||||
assert(num_rows <= num_routers)
|
|
||||||
num_columns = int(num_routers / num_rows)
|
|
||||||
assert(num_columns * num_rows == num_routers)
|
|
||||||
|
|
||||||
# Create the mesh object
|
|
||||||
mesh = Mesh()
|
|
||||||
|
|
||||||
# Create the routers in the mesh
|
|
||||||
mesh.routers = [Router(router_id=i) for i in range(num_routers)]
|
|
||||||
|
|
||||||
# link counter to set unique link ids
|
|
||||||
link_count = 0
|
|
||||||
|
|
||||||
# Add all but the remainder nodes to the list of nodes to be uniformly
|
|
||||||
# distributed across the network.
|
|
||||||
network_nodes = []
|
|
||||||
remainder_nodes = []
|
|
||||||
for node_index in xrange(len(nodes)):
|
|
||||||
if node_index < (len(nodes) - remainder):
|
|
||||||
network_nodes.append(nodes[node_index])
|
|
||||||
else:
|
|
||||||
remainder_nodes.append(nodes[node_index])
|
|
||||||
|
|
||||||
# Connect each node to the appropriate router
|
|
||||||
ext_links = []
|
|
||||||
for (i, n) in enumerate(network_nodes):
|
|
||||||
cntrl_level, router_id = divmod(i, num_routers)
|
|
||||||
assert(cntrl_level < cntrls_per_router)
|
|
||||||
ext_links.append(ExtLink(link_id=link_count, ext_node=n,
|
|
||||||
int_node=mesh.routers[router_id]))
|
|
||||||
link_count += 1
|
|
||||||
|
|
||||||
# Connect the remainding nodes to router 0. These should only be
|
|
||||||
# DMA nodes.
|
|
||||||
for (i, node) in enumerate(remainder_nodes):
|
|
||||||
assert(node.type == 'DMA_Controller')
|
|
||||||
assert(i < remainder)
|
|
||||||
ext_links.append(ExtLink(link_id=link_count, ext_node=node,
|
|
||||||
int_node=mesh.routers[0]))
|
|
||||||
link_count += 1
|
|
||||||
|
|
||||||
# Create the mesh links. First row (east-west) links then column
|
|
||||||
# (north-south) links
|
|
||||||
int_links = []
|
|
||||||
for row in xrange(num_rows):
|
|
||||||
for col in xrange(num_columns):
|
|
||||||
if (col + 1 < num_columns):
|
|
||||||
east_id = col + (row * num_columns)
|
|
||||||
west_id = (col + 1) + (row * num_columns)
|
|
||||||
int_links.append(IntLink(link_id=link_count,
|
|
||||||
node_a=mesh.routers[east_id],
|
|
||||||
node_b=mesh.routers[west_id],
|
|
||||||
weight=1))
|
|
||||||
link_count += 1
|
|
||||||
|
|
||||||
for col in xrange(num_columns):
|
|
||||||
for row in xrange(num_rows):
|
|
||||||
if (row + 1 < num_rows):
|
|
||||||
north_id = col + (row * num_columns)
|
|
||||||
south_id = col + ((row + 1) * num_columns)
|
|
||||||
int_links.append(IntLink(link_id=link_count,
|
|
||||||
node_a=mesh.routers[north_id],
|
|
||||||
node_b=mesh.routers[south_id],
|
|
||||||
weight=2))
|
|
||||||
link_count += 1
|
|
||||||
|
|
||||||
mesh.int_links = int_links
|
|
||||||
mesh.ext_links = ext_links
|
|
||||||
|
|
||||||
return mesh
|
|
|
@ -1,132 +0,0 @@
|
||||||
# Copyright (c) 2010 Advanced Micro Devices, Inc.
|
|
||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
#
|
|
||||||
# Authors: Brad Beckmann
|
|
||||||
|
|
||||||
from m5.params import *
|
|
||||||
from m5.objects import *
|
|
||||||
|
|
||||||
class MeshDirCorners(Topology):
|
|
||||||
description='MeshDirCorners'
|
|
||||||
|
|
||||||
# This file contains a special network creation function. This
|
|
||||||
# networks is not general and will only work with specific system
|
|
||||||
# configurations. The network specified is similar to GEMS old file
|
|
||||||
# specified network.
|
|
||||||
|
|
||||||
def makeTopology(nodes, options, IntLink, ExtLink, Router):
|
|
||||||
num_routers = options.num_cpus
|
|
||||||
num_rows = options.mesh_rows
|
|
||||||
|
|
||||||
# First determine which nodes are cache cntrls vs. dirs vs. dma
|
|
||||||
cache_nodes = []
|
|
||||||
dir_nodes = []
|
|
||||||
dma_nodes = []
|
|
||||||
for node in nodes:
|
|
||||||
if node.type == 'L1Cache_Controller' or \
|
|
||||||
node.type == 'L2Cache_Controller':
|
|
||||||
cache_nodes.append(node)
|
|
||||||
elif node.type == 'Directory_Controller':
|
|
||||||
dir_nodes.append(node)
|
|
||||||
elif node.type == 'DMA_Controller':
|
|
||||||
dma_nodes.append(node)
|
|
||||||
|
|
||||||
# Obviously the number or rows must be <= the number of routers
|
|
||||||
# and evenly divisible. Also the number of caches must be a
|
|
||||||
# multiple of the number of routers and the number of directories
|
|
||||||
# must be four.
|
|
||||||
assert(num_rows <= num_routers)
|
|
||||||
num_columns = int(num_routers / num_rows)
|
|
||||||
assert(num_columns * num_rows == num_routers)
|
|
||||||
caches_per_router, remainder = divmod(len(cache_nodes), num_routers)
|
|
||||||
assert(remainder == 0)
|
|
||||||
assert(len(dir_nodes) == 4)
|
|
||||||
|
|
||||||
mesh = MeshDirCorners()
|
|
||||||
|
|
||||||
# Create the routers in the mesh
|
|
||||||
mesh.routers = [Router(router_id=i) for i in range(num_routers)]
|
|
||||||
|
|
||||||
# link counter to set unique link ids
|
|
||||||
link_count = 0
|
|
||||||
|
|
||||||
# Connect each cache controller to the appropriate router
|
|
||||||
ext_links = []
|
|
||||||
for (i, n) in enumerate(cache_nodes):
|
|
||||||
cntrl_level, router_id = divmod(i, num_routers)
|
|
||||||
assert(cntrl_level < caches_per_router)
|
|
||||||
ext_links.append(ExtLink(link_id=link_count, ext_node=n,
|
|
||||||
int_node=mesh.routers[router_id]))
|
|
||||||
link_count += 1
|
|
||||||
|
|
||||||
# Connect the dir nodes to the corners.
|
|
||||||
ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[0],
|
|
||||||
int_node=mesh.routers[0]))
|
|
||||||
link_count += 1
|
|
||||||
ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[1],
|
|
||||||
int_node=mesh.routers[num_columns - 1]))
|
|
||||||
link_count += 1
|
|
||||||
ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[2],
|
|
||||||
int_node=mesh.routers[num_routers - num_columns]))
|
|
||||||
link_count += 1
|
|
||||||
ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[3],
|
|
||||||
int_node=mesh.routers[num_routers - 1]))
|
|
||||||
link_count += 1
|
|
||||||
|
|
||||||
# Connect the dma nodes to router 0. These should only be DMA nodes.
|
|
||||||
for (i, node) in enumerate(dma_nodes):
|
|
||||||
assert(node.type == 'DMA_Controller')
|
|
||||||
ext_links.append(ExtLink(link_id=link_count, ext_node=node, int_node=mesh.routers[0]))
|
|
||||||
|
|
||||||
# Create the mesh links. First row (east-west) links then column
|
|
||||||
# (north-south) links
|
|
||||||
int_links = []
|
|
||||||
for row in xrange(num_rows):
|
|
||||||
for col in xrange(num_columns):
|
|
||||||
if (col + 1 < num_columns):
|
|
||||||
east_id = col + (row * num_columns)
|
|
||||||
west_id = (col + 1) + (row * num_columns)
|
|
||||||
int_links.append(IntLink(link_id=link_count,
|
|
||||||
node_a=mesh.routers[east_id],
|
|
||||||
node_b=mesh.routers[west_id],
|
|
||||||
weight=1))
|
|
||||||
link_count += 1
|
|
||||||
|
|
||||||
for col in xrange(num_columns):
|
|
||||||
for row in xrange(num_rows):
|
|
||||||
if (row + 1 < num_rows):
|
|
||||||
north_id = col + (row * num_columns)
|
|
||||||
south_id = col + ((row + 1) * num_columns)
|
|
||||||
int_links.append(IntLink(link_id=link_count,
|
|
||||||
node_a=mesh.routers[north_id],
|
|
||||||
node_b=mesh.routers[south_id],
|
|
||||||
weight=2))
|
|
||||||
link_count += 1
|
|
||||||
|
|
||||||
mesh.ext_links = ext_links
|
|
||||||
mesh.int_links = int_links
|
|
||||||
|
|
||||||
return mesh
|
|
|
@ -33,8 +33,4 @@ Import('*')
|
||||||
if env['PROTOCOL'] == 'None':
|
if env['PROTOCOL'] == 'None':
|
||||||
Return()
|
Return()
|
||||||
|
|
||||||
PySource('', 'Crossbar.py')
|
PySource('', 'TopologyCreator.py')
|
||||||
PySource('', 'Mesh.py')
|
|
||||||
PySource('', 'MeshDirCorners.py')
|
|
||||||
PySource('', 'Pt2Pt.py')
|
|
||||||
PySource('', 'Torus.py')
|
|
||||||
|
|
19
src/mem/ruby/network/topologies/TopologyCreator.py
Normal file
19
src/mem/ruby/network/topologies/TopologyCreator.py
Normal file
|
@ -0,0 +1,19 @@
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
from m5.params import *
|
||||||
|
from m5.objects import *
|
||||||
|
|
||||||
|
def instantiateTopology(topology, options, IntLink, ExtLink, Router):
|
||||||
|
|
||||||
|
topo = Topology()
|
||||||
|
topo.description = topology.description
|
||||||
|
|
||||||
|
routers, int_links, ext_links = topology.makeTopology(options, IntLink, ExtLink, Router)
|
||||||
|
|
||||||
|
topo.routers = routers
|
||||||
|
topo.int_links = int_links
|
||||||
|
topo.ext_links = ext_links
|
||||||
|
|
||||||
|
return topo
|
|
@ -1,126 +0,0 @@
|
||||||
# Copyright (c) 2011 Advanced Micro Devices, Inc.
|
|
||||||
# 2011 Massachusetts Institute of Technology
|
|
||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
#
|
|
||||||
# Authors: Brad Beckmann
|
|
||||||
# Tushar Krishna
|
|
||||||
|
|
||||||
from m5.params import *
|
|
||||||
from m5.objects import *
|
|
||||||
|
|
||||||
class Torus(Topology):
|
|
||||||
description='Torus'
|
|
||||||
|
|
||||||
# Makes a generic torus assuming an equal number of cache and directory cntrls
|
|
||||||
# Assuming a folded-torus on-chip layout (as shown on gem5 wiki).
|
|
||||||
# All links (including the wrap-around ones) are of equal length, double that
|
|
||||||
# of a mesh. Thus, each link is assigned a latency of 2 cycles.
|
|
||||||
|
|
||||||
def makeTopology(nodes, options, IntLink, ExtLink, Router):
|
|
||||||
|
|
||||||
num_routers = options.num_cpus
|
|
||||||
num_rows = options.mesh_rows
|
|
||||||
|
|
||||||
# There must be an evenly divisible number of cntrls to routers
|
|
||||||
# Also, obviously the number or rows must be <= the number of routers
|
|
||||||
cntrls_per_router, remainder = divmod(len(nodes), num_routers)
|
|
||||||
assert(num_rows <= num_routers)
|
|
||||||
num_columns = int(num_routers / num_rows)
|
|
||||||
assert(num_columns * num_rows == num_routers)
|
|
||||||
|
|
||||||
# Create the torus object
|
|
||||||
torus = Torus()
|
|
||||||
|
|
||||||
# Create the routers in the torus
|
|
||||||
torus.routers = [Router(router_id=i) for i in range(num_routers)]
|
|
||||||
|
|
||||||
# link counter to set unique link ids
|
|
||||||
link_count = 0
|
|
||||||
|
|
||||||
# Add all but the remainder nodes to the list of nodes to be uniformly
|
|
||||||
# distributed across the network.
|
|
||||||
network_nodes = []
|
|
||||||
remainder_nodes = []
|
|
||||||
for node_index in xrange(len(nodes)):
|
|
||||||
if node_index < (len(nodes) - remainder):
|
|
||||||
network_nodes.append(nodes[node_index])
|
|
||||||
else:
|
|
||||||
remainder_nodes.append(nodes[node_index])
|
|
||||||
|
|
||||||
# Connect each node to the appropriate router
|
|
||||||
ext_links = []
|
|
||||||
for (i, n) in enumerate(network_nodes):
|
|
||||||
cntrl_level, router_id = divmod(i, num_routers)
|
|
||||||
assert(cntrl_level < cntrls_per_router)
|
|
||||||
ext_links.append(ExtLink(link_id=link_count, ext_node=n,
|
|
||||||
int_node=torus.routers[router_id]))
|
|
||||||
link_count += 1
|
|
||||||
|
|
||||||
# Connect the remainding nodes to router 0. These should only be
|
|
||||||
# DMA nodes.
|
|
||||||
for (i, node) in enumerate(remainder_nodes):
|
|
||||||
assert(node.type == 'DMA_Controller')
|
|
||||||
assert(i < remainder)
|
|
||||||
ext_links.append(ExtLink(link_id=link_count, ext_node=node,
|
|
||||||
int_node=torus.routers[0]))
|
|
||||||
link_count += 1
|
|
||||||
|
|
||||||
# Create the torus links. First row (east-west) links then column
|
|
||||||
# (north-south) links
|
|
||||||
# column links are given higher weights to implement XY routing
|
|
||||||
int_links = []
|
|
||||||
for row in xrange(num_rows):
|
|
||||||
for col in xrange(num_columns):
|
|
||||||
west_id = col + (row * num_columns)
|
|
||||||
if (col + 1 < num_columns):
|
|
||||||
east_id = (col + 1) + (row * num_columns)
|
|
||||||
else:
|
|
||||||
east_id = (row * num_columns)
|
|
||||||
int_links.append(IntLink(link_id=link_count,
|
|
||||||
node_a=torus.routers[east_id],
|
|
||||||
node_b=torus.routers[west_id],
|
|
||||||
latency=2,
|
|
||||||
weight=1))
|
|
||||||
link_count += 1
|
|
||||||
|
|
||||||
for col in xrange(num_columns):
|
|
||||||
for row in xrange(num_rows):
|
|
||||||
north_id = col + (row * num_columns)
|
|
||||||
if (row + 1 < num_rows):
|
|
||||||
south_id = col + ((row + 1) * num_columns)
|
|
||||||
else:
|
|
||||||
south_id = col
|
|
||||||
int_links.append(IntLink(link_id=link_count,
|
|
||||||
node_a=torus.routers[north_id],
|
|
||||||
node_b=torus.routers[south_id],
|
|
||||||
latency=2,
|
|
||||||
weight=2))
|
|
||||||
link_count += 1
|
|
||||||
|
|
||||||
torus.ext_links = ext_links
|
|
||||||
torus.int_links = int_links
|
|
||||||
|
|
||||||
return torus
|
|
|
@ -168,9 +168,14 @@ class MetaSimObject(type):
|
||||||
cls._port_refs = multidict() # port ref objects
|
cls._port_refs = multidict() # port ref objects
|
||||||
cls._instantiated = False # really instantiated, cloned, or subclassed
|
cls._instantiated = False # really instantiated, cloned, or subclassed
|
||||||
|
|
||||||
# We don't support multiple inheritance. If you want to, you
|
# We don't support multiple inheritance of sim objects. If you want
|
||||||
# must fix multidict to deal with it properly.
|
# to, you must fix multidict to deal with it properly. Non sim-objects
|
||||||
if len(bases) > 1:
|
# are ok, though
|
||||||
|
bTotal = 0
|
||||||
|
for c in bases:
|
||||||
|
if isinstance(c, MetaSimObject):
|
||||||
|
bTotal += 1
|
||||||
|
if bTotal > 1:
|
||||||
raise TypeError, "SimObjects do not support multiple inheritance"
|
raise TypeError, "SimObjects do not support multiple inheritance"
|
||||||
|
|
||||||
base = bases[0]
|
base = bases[0]
|
||||||
|
|
Loading…
Reference in a new issue