Ethernet: share statistics between all ethernet devices and apply some

of those statistics to the e1000 model.
This commit is contained in:
Nathan Binkert 2008-06-17 22:22:44 -07:00
parent 87d03d00cd
commit 1099a9838a
7 changed files with 437 additions and 395 deletions

View file

@ -46,6 +46,7 @@ if env['FULL_SYSTEM']:
Source('baddev.cc')
Source('disk_image.cc')
Source('etherbus.cc')
Source('etherdevice.cc')
Source('etherdump.cc')
Source('etherint.cc')
Source('etherlink.cc')

367
src/dev/etherdevice.cc Normal file
View file

@ -0,0 +1,367 @@
/*
* Copyright (c) 2004-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Nathan Binkert
* Lisa Hsu
*/
#include "dev/etherdevice.hh"
#include "sim/stats.hh"
void
EtherDevice::regStats()
{
txBytes
.name(name() + ".txBytes")
.desc("Bytes Transmitted")
.prereq(txBytes)
;
rxBytes
.name(name() + ".rxBytes")
.desc("Bytes Received")
.prereq(rxBytes)
;
txPackets
.name(name() + ".txPackets")
.desc("Number of Packets Transmitted")
.prereq(txBytes)
;
rxPackets
.name(name() + ".rxPackets")
.desc("Number of Packets Received")
.prereq(rxBytes)
;
txIpChecksums
.name(name() + ".txIpChecksums")
.desc("Number of tx IP Checksums done by device")
.precision(0)
.prereq(txBytes)
;
rxIpChecksums
.name(name() + ".rxIpChecksums")
.desc("Number of rx IP Checksums done by device")
.precision(0)
.prereq(rxBytes)
;
txTcpChecksums
.name(name() + ".txTcpChecksums")
.desc("Number of tx TCP Checksums done by device")
.precision(0)
.prereq(txBytes)
;
rxTcpChecksums
.name(name() + ".rxTcpChecksums")
.desc("Number of rx TCP Checksums done by device")
.precision(0)
.prereq(rxBytes)
;
txUdpChecksums
.name(name() + ".txUdpChecksums")
.desc("Number of tx UDP Checksums done by device")
.precision(0)
.prereq(txBytes)
;
rxUdpChecksums
.name(name() + ".rxUdpChecksums")
.desc("Number of rx UDP Checksums done by device")
.precision(0)
.prereq(rxBytes)
;
descDmaReads
.name(name() + ".descDMAReads")
.desc("Number of descriptors the device read w/ DMA")
.precision(0)
;
descDmaWrites
.name(name() + ".descDMAWrites")
.desc("Number of descriptors the device wrote w/ DMA")
.precision(0)
;
descDmaRdBytes
.name(name() + ".descDmaReadBytes")
.desc("number of descriptor bytes read w/ DMA")
.precision(0)
;
descDmaWrBytes
.name(name() + ".descDmaWriteBytes")
.desc("number of descriptor bytes write w/ DMA")
.precision(0)
;
txBandwidth
.name(name() + ".txBandwidth")
.desc("Transmit Bandwidth (bits/s)")
.precision(0)
.prereq(txBytes)
;
rxBandwidth
.name(name() + ".rxBandwidth")
.desc("Receive Bandwidth (bits/s)")
.precision(0)
.prereq(rxBytes)
;
totBandwidth
.name(name() + ".totBandwidth")
.desc("Total Bandwidth (bits/s)")
.precision(0)
.prereq(totBytes)
;
totPackets
.name(name() + ".totPackets")
.desc("Total Packets")
.precision(0)
.prereq(totBytes)
;
totBytes
.name(name() + ".totBytes")
.desc("Total Bytes")
.precision(0)
.prereq(totBytes)
;
totPacketRate
.name(name() + ".totPPS")
.desc("Total Tranmission Rate (packets/s)")
.precision(0)
.prereq(totBytes)
;
txPacketRate
.name(name() + ".txPPS")
.desc("Packet Tranmission Rate (packets/s)")
.precision(0)
.prereq(txBytes)
;
rxPacketRate
.name(name() + ".rxPPS")
.desc("Packet Reception Rate (packets/s)")
.precision(0)
.prereq(rxBytes)
;
postedSwi
.name(name() + ".postedSwi")
.desc("number of software interrupts posted to CPU")
.precision(0)
;
totalSwi
.name(name() + ".totalSwi")
.desc("total number of Swi written to ISR")
.precision(0)
;
coalescedSwi
.name(name() + ".coalescedSwi")
.desc("average number of Swi's coalesced into each post")
.precision(0)
;
postedRxIdle
.name(name() + ".postedRxIdle")
.desc("number of rxIdle interrupts posted to CPU")
.precision(0)
;
totalRxIdle
.name(name() + ".totalRxIdle")
.desc("total number of RxIdle written to ISR")
.precision(0)
;
coalescedRxIdle
.name(name() + ".coalescedRxIdle")
.desc("average number of RxIdle's coalesced into each post")
.precision(0)
;
postedRxOk
.name(name() + ".postedRxOk")
.desc("number of RxOk interrupts posted to CPU")
.precision(0)
;
totalRxOk
.name(name() + ".totalRxOk")
.desc("total number of RxOk written to ISR")
.precision(0)
;
coalescedRxOk
.name(name() + ".coalescedRxOk")
.desc("average number of RxOk's coalesced into each post")
.precision(0)
;
postedRxDesc
.name(name() + ".postedRxDesc")
.desc("number of RxDesc interrupts posted to CPU")
.precision(0)
;
totalRxDesc
.name(name() + ".totalRxDesc")
.desc("total number of RxDesc written to ISR")
.precision(0)
;
coalescedRxDesc
.name(name() + ".coalescedRxDesc")
.desc("average number of RxDesc's coalesced into each post")
.precision(0)
;
postedTxOk
.name(name() + ".postedTxOk")
.desc("number of TxOk interrupts posted to CPU")
.precision(0)
;
totalTxOk
.name(name() + ".totalTxOk")
.desc("total number of TxOk written to ISR")
.precision(0)
;
coalescedTxOk
.name(name() + ".coalescedTxOk")
.desc("average number of TxOk's coalesced into each post")
.precision(0)
;
postedTxIdle
.name(name() + ".postedTxIdle")
.desc("number of TxIdle interrupts posted to CPU")
.precision(0)
;
totalTxIdle
.name(name() + ".totalTxIdle")
.desc("total number of TxIdle written to ISR")
.precision(0)
;
coalescedTxIdle
.name(name() + ".coalescedTxIdle")
.desc("average number of TxIdle's coalesced into each post")
.precision(0)
;
postedTxDesc
.name(name() + ".postedTxDesc")
.desc("number of TxDesc interrupts posted to CPU")
.precision(0)
;
totalTxDesc
.name(name() + ".totalTxDesc")
.desc("total number of TxDesc written to ISR")
.precision(0)
;
coalescedTxDesc
.name(name() + ".coalescedTxDesc")
.desc("average number of TxDesc's coalesced into each post")
.precision(0)
;
postedRxOrn
.name(name() + ".postedRxOrn")
.desc("number of RxOrn posted to CPU")
.precision(0)
;
totalRxOrn
.name(name() + ".totalRxOrn")
.desc("total number of RxOrn written to ISR")
.precision(0)
;
coalescedRxOrn
.name(name() + ".coalescedRxOrn")
.desc("average number of RxOrn's coalesced into each post")
.precision(0)
;
coalescedTotal
.name(name() + ".coalescedTotal")
.desc("average number of interrupts coalesced into each post")
.precision(0)
;
postedInterrupts
.name(name() + ".postedInterrupts")
.desc("number of posts to CPU")
.precision(0)
;
droppedPackets
.name(name() + ".droppedPackets")
.desc("number of packets dropped")
.precision(0)
;
coalescedSwi = totalSwi / postedInterrupts;
coalescedRxIdle = totalRxIdle / postedInterrupts;
coalescedRxOk = totalRxOk / postedInterrupts;
coalescedRxDesc = totalRxDesc / postedInterrupts;
coalescedTxOk = totalTxOk / postedInterrupts;
coalescedTxIdle = totalTxIdle / postedInterrupts;
coalescedTxDesc = totalTxDesc / postedInterrupts;
coalescedRxOrn = totalRxOrn / postedInterrupts;
coalescedTotal = (totalSwi + totalRxIdle + totalRxOk + totalRxDesc +
totalTxOk + totalTxIdle + totalTxDesc +
totalRxOrn) / postedInterrupts;
txBandwidth = txBytes * Stats::constant(8) / simSeconds;
rxBandwidth = rxBytes * Stats::constant(8) / simSeconds;
totBandwidth = txBandwidth + rxBandwidth;
totBytes = txBytes + rxBytes;
totPackets = txPackets + rxPackets;
txPacketRate = txPackets / simSeconds;
rxPacketRate = rxPackets / simSeconds;
}

View file

@ -36,6 +36,7 @@
#ifndef __DEV_ETHERDEVICE_HH__
#define __DEV_ETHERDEVICE_HH__
#include "base/statistics.hh"
#include "dev/pcidev.hh"
#include "params/EtherDevice.hh"
#include "sim/sim_object.hh"
@ -64,6 +65,59 @@ class EtherDevice : public PciDev
/** Additional function to return the Port of a memory object. */
virtual EtherInt *getEthPort(const std::string &if_name, int idx = -1) = 0;
public:
void regStats();
protected:
Stats::Scalar<> txBytes;
Stats::Scalar<> rxBytes;
Stats::Scalar<> txPackets;
Stats::Scalar<> rxPackets;
Stats::Scalar<> txIpChecksums;
Stats::Scalar<> rxIpChecksums;
Stats::Scalar<> txTcpChecksums;
Stats::Scalar<> rxTcpChecksums;
Stats::Scalar<> txUdpChecksums;
Stats::Scalar<> rxUdpChecksums;
Stats::Scalar<> descDmaReads;
Stats::Scalar<> descDmaWrites;
Stats::Scalar<> descDmaRdBytes;
Stats::Scalar<> descDmaWrBytes;
Stats::Formula totBandwidth;
Stats::Formula totPackets;
Stats::Formula totBytes;
Stats::Formula totPacketRate;
Stats::Formula txBandwidth;
Stats::Formula rxBandwidth;
Stats::Formula txPacketRate;
Stats::Formula rxPacketRate;
Stats::Scalar<> postedSwi;
Stats::Formula coalescedSwi;
Stats::Scalar<> totalSwi;
Stats::Scalar<> postedRxIdle;
Stats::Formula coalescedRxIdle;
Stats::Scalar<> totalRxIdle;
Stats::Scalar<> postedRxOk;
Stats::Formula coalescedRxOk;
Stats::Scalar<> totalRxOk;
Stats::Scalar<> postedRxDesc;
Stats::Formula coalescedRxDesc;
Stats::Scalar<> totalRxDesc;
Stats::Scalar<> postedTxOk;
Stats::Formula coalescedTxOk;
Stats::Scalar<> totalTxOk;
Stats::Scalar<> postedTxIdle;
Stats::Formula coalescedTxIdle;
Stats::Scalar<> totalTxIdle;
Stats::Scalar<> postedTxDesc;
Stats::Formula coalescedTxDesc;
Stats::Scalar<> totalTxDesc;
Stats::Scalar<> postedRxOrn;
Stats::Formula coalescedRxOrn;
Stats::Scalar<> totalRxOrn;
Stats::Formula coalescedTotal;
Stats::Scalar<> postedInterrupts;
Stats::Scalar<> droppedPackets;
};
#endif //__DEV_ETHERDEVICE_HH__

View file

@ -584,6 +584,7 @@ IGbE::postInterrupt(IntTypes t, bool now)
if (interEvent.scheduled()) {
interEvent.deschedule();
}
postedInterrupts++;
cpuPostInt();
} else {
DPRINTF(EthernetIntr, "EINT: Scheduling timer interrupt for %d ticks\n",
@ -740,6 +741,7 @@ IGbE::RxDescCache::pktComplete()
DPRINTF(EthernetDesc, "Checking IP checksum\n");
status |= RXDS_IPCS;
desc->csum = htole(cksum(ip));
igbe->rxIpChecksums++;
if (cksum(ip) != 0) {
err |= RXDE_IPE;
DPRINTF(EthernetDesc, "Checksum is bad!!\n");
@ -750,6 +752,7 @@ IGbE::RxDescCache::pktComplete()
DPRINTF(EthernetDesc, "Checking TCP checksum\n");
status |= RXDS_TCPCS;
desc->csum = htole(cksum(tcp));
igbe->rxTcpChecksums++;
if (cksum(tcp) != 0) {
DPRINTF(EthernetDesc, "Checksum is bad!!\n");
err |= RXDE_TCPE;
@ -761,6 +764,7 @@ IGbE::RxDescCache::pktComplete()
DPRINTF(EthernetDesc, "Checking UDP checksum\n");
status |= RXDS_UDPCS;
desc->csum = htole(cksum(udp));
igbe->rxUdpChecksums++;
if (cksum(udp) != 0) {
DPRINTF(EthernetDesc, "Checksum is bad!!\n");
err |= RXDE_TCPE;
@ -994,6 +998,7 @@ IGbE::TxDescCache::pktComplete()
if (TxdOp::ixsm(desc)) {
ip->sum(0);
ip->sum(cksum(ip));
igbe->txIpChecksums++;
DPRINTF(EthernetDesc, "Calculated IP checksum\n");
}
if (TxdOp::txsm(desc)) {
@ -1002,11 +1007,13 @@ IGbE::TxDescCache::pktComplete()
if (tcp) {
tcp->sum(0);
tcp->sum(cksum(tcp));
igbe->txTcpChecksums++;
DPRINTF(EthernetDesc, "Calculated TCP checksum\n");
} else if (udp) {
assert(udp);
udp->sum(0);
udp->sum(cksum(udp));
igbe->txUdpChecksums++;
DPRINTF(EthernetDesc, "Calculated UDP checksum\n");
} else {
panic("Told to checksum, but don't know how\n");
@ -1247,6 +1254,9 @@ IGbE::txStateMachine()
bool
IGbE::ethRxPkt(EthPacketPtr pkt)
{
rxBytes += pkt->length;
rxPackets++;
DPRINTF(Ethernet, "RxFIFO: Receiving pcakte from wire\n");
if (!regs.rctl.en()) {
@ -1380,6 +1390,10 @@ IGbE::txWire()
}
DPRINTF(EthernetSM, "TxFIFO: Successful transmit, bytes available in fifo: %d\n",
txFifo.avail());
txBytes += txFifo.front()->length;
txPackets++;
txFifo.pop();
} else {
// We'll get woken up when the packet ethTxDone() gets called

View file

@ -39,7 +39,6 @@
#include <string>
#include "base/inet.hh"
#include "base/statistics.hh"
#include "dev/etherdevice.hh"
#include "dev/etherint.hh"
#include "dev/etherpkt.hh"

View file

@ -46,7 +46,6 @@
#include "params/NSGigE.hh"
#include "sim/debug.hh"
#include "sim/host.hh"
#include "sim/stats.hh"
#include "sim/system.hh"
const char *NsRxStateStrings[] =
@ -131,341 +130,6 @@ NSGigE::NSGigE(Params *p)
NSGigE::~NSGigE()
{}
void
NSGigE::regStats()
{
txBytes
.name(name() + ".txBytes")
.desc("Bytes Transmitted")
.prereq(txBytes)
;
rxBytes
.name(name() + ".rxBytes")
.desc("Bytes Received")
.prereq(rxBytes)
;
txPackets
.name(name() + ".txPackets")
.desc("Number of Packets Transmitted")
.prereq(txBytes)
;
rxPackets
.name(name() + ".rxPackets")
.desc("Number of Packets Received")
.prereq(rxBytes)
;
txIpChecksums
.name(name() + ".txIpChecksums")
.desc("Number of tx IP Checksums done by device")
.precision(0)
.prereq(txBytes)
;
rxIpChecksums
.name(name() + ".rxIpChecksums")
.desc("Number of rx IP Checksums done by device")
.precision(0)
.prereq(rxBytes)
;
txTcpChecksums
.name(name() + ".txTcpChecksums")
.desc("Number of tx TCP Checksums done by device")
.precision(0)
.prereq(txBytes)
;
rxTcpChecksums
.name(name() + ".rxTcpChecksums")
.desc("Number of rx TCP Checksums done by device")
.precision(0)
.prereq(rxBytes)
;
txUdpChecksums
.name(name() + ".txUdpChecksums")
.desc("Number of tx UDP Checksums done by device")
.precision(0)
.prereq(txBytes)
;
rxUdpChecksums
.name(name() + ".rxUdpChecksums")
.desc("Number of rx UDP Checksums done by device")
.precision(0)
.prereq(rxBytes)
;
descDmaReads
.name(name() + ".descDMAReads")
.desc("Number of descriptors the device read w/ DMA")
.precision(0)
;
descDmaWrites
.name(name() + ".descDMAWrites")
.desc("Number of descriptors the device wrote w/ DMA")
.precision(0)
;
descDmaRdBytes
.name(name() + ".descDmaReadBytes")
.desc("number of descriptor bytes read w/ DMA")
.precision(0)
;
descDmaWrBytes
.name(name() + ".descDmaWriteBytes")
.desc("number of descriptor bytes write w/ DMA")
.precision(0)
;
txBandwidth
.name(name() + ".txBandwidth")
.desc("Transmit Bandwidth (bits/s)")
.precision(0)
.prereq(txBytes)
;
rxBandwidth
.name(name() + ".rxBandwidth")
.desc("Receive Bandwidth (bits/s)")
.precision(0)
.prereq(rxBytes)
;
totBandwidth
.name(name() + ".totBandwidth")
.desc("Total Bandwidth (bits/s)")
.precision(0)
.prereq(totBytes)
;
totPackets
.name(name() + ".totPackets")
.desc("Total Packets")
.precision(0)
.prereq(totBytes)
;
totBytes
.name(name() + ".totBytes")
.desc("Total Bytes")
.precision(0)
.prereq(totBytes)
;
totPacketRate
.name(name() + ".totPPS")
.desc("Total Tranmission Rate (packets/s)")
.precision(0)
.prereq(totBytes)
;
txPacketRate
.name(name() + ".txPPS")
.desc("Packet Tranmission Rate (packets/s)")
.precision(0)
.prereq(txBytes)
;
rxPacketRate
.name(name() + ".rxPPS")
.desc("Packet Reception Rate (packets/s)")
.precision(0)
.prereq(rxBytes)
;
postedSwi
.name(name() + ".postedSwi")
.desc("number of software interrupts posted to CPU")
.precision(0)
;
totalSwi
.name(name() + ".totalSwi")
.desc("total number of Swi written to ISR")
.precision(0)
;
coalescedSwi
.name(name() + ".coalescedSwi")
.desc("average number of Swi's coalesced into each post")
.precision(0)
;
postedRxIdle
.name(name() + ".postedRxIdle")
.desc("number of rxIdle interrupts posted to CPU")
.precision(0)
;
totalRxIdle
.name(name() + ".totalRxIdle")
.desc("total number of RxIdle written to ISR")
.precision(0)
;
coalescedRxIdle
.name(name() + ".coalescedRxIdle")
.desc("average number of RxIdle's coalesced into each post")
.precision(0)
;
postedRxOk
.name(name() + ".postedRxOk")
.desc("number of RxOk interrupts posted to CPU")
.precision(0)
;
totalRxOk
.name(name() + ".totalRxOk")
.desc("total number of RxOk written to ISR")
.precision(0)
;
coalescedRxOk
.name(name() + ".coalescedRxOk")
.desc("average number of RxOk's coalesced into each post")
.precision(0)
;
postedRxDesc
.name(name() + ".postedRxDesc")
.desc("number of RxDesc interrupts posted to CPU")
.precision(0)
;
totalRxDesc
.name(name() + ".totalRxDesc")
.desc("total number of RxDesc written to ISR")
.precision(0)
;
coalescedRxDesc
.name(name() + ".coalescedRxDesc")
.desc("average number of RxDesc's coalesced into each post")
.precision(0)
;
postedTxOk
.name(name() + ".postedTxOk")
.desc("number of TxOk interrupts posted to CPU")
.precision(0)
;
totalTxOk
.name(name() + ".totalTxOk")
.desc("total number of TxOk written to ISR")
.precision(0)
;
coalescedTxOk
.name(name() + ".coalescedTxOk")
.desc("average number of TxOk's coalesced into each post")
.precision(0)
;
postedTxIdle
.name(name() + ".postedTxIdle")
.desc("number of TxIdle interrupts posted to CPU")
.precision(0)
;
totalTxIdle
.name(name() + ".totalTxIdle")
.desc("total number of TxIdle written to ISR")
.precision(0)
;
coalescedTxIdle
.name(name() + ".coalescedTxIdle")
.desc("average number of TxIdle's coalesced into each post")
.precision(0)
;
postedTxDesc
.name(name() + ".postedTxDesc")
.desc("number of TxDesc interrupts posted to CPU")
.precision(0)
;
totalTxDesc
.name(name() + ".totalTxDesc")
.desc("total number of TxDesc written to ISR")
.precision(0)
;
coalescedTxDesc
.name(name() + ".coalescedTxDesc")
.desc("average number of TxDesc's coalesced into each post")
.precision(0)
;
postedRxOrn
.name(name() + ".postedRxOrn")
.desc("number of RxOrn posted to CPU")
.precision(0)
;
totalRxOrn
.name(name() + ".totalRxOrn")
.desc("total number of RxOrn written to ISR")
.precision(0)
;
coalescedRxOrn
.name(name() + ".coalescedRxOrn")
.desc("average number of RxOrn's coalesced into each post")
.precision(0)
;
coalescedTotal
.name(name() + ".coalescedTotal")
.desc("average number of interrupts coalesced into each post")
.precision(0)
;
postedInterrupts
.name(name() + ".postedInterrupts")
.desc("number of posts to CPU")
.precision(0)
;
droppedPackets
.name(name() + ".droppedPackets")
.desc("number of packets dropped")
.precision(0)
;
coalescedSwi = totalSwi / postedInterrupts;
coalescedRxIdle = totalRxIdle / postedInterrupts;
coalescedRxOk = totalRxOk / postedInterrupts;
coalescedRxDesc = totalRxDesc / postedInterrupts;
coalescedTxOk = totalTxOk / postedInterrupts;
coalescedTxIdle = totalTxIdle / postedInterrupts;
coalescedTxDesc = totalTxDesc / postedInterrupts;
coalescedRxOrn = totalRxOrn / postedInterrupts;
coalescedTotal = (totalSwi + totalRxIdle + totalRxOk + totalRxDesc +
totalTxOk + totalTxIdle + totalTxDesc +
totalRxOrn) / postedInterrupts;
txBandwidth = txBytes * Stats::constant(8) / simSeconds;
rxBandwidth = rxBytes * Stats::constant(8) / simSeconds;
totBandwidth = txBandwidth + rxBandwidth;
totBytes = txBytes + rxBytes;
totPackets = txPackets + rxPackets;
txPacketRate = txPackets / simSeconds;
rxPacketRate = rxPackets / simSeconds;
}
/**
* This is to write to the PCI general configuration registers
*/
@ -1186,6 +850,7 @@ NSGigE::devIntrPost(uint32_t interrupts)
Tick when = curTick;
if ((regs.isr & regs.imr & ISR_NODELAY) == 0)
when += intrDelay;
postedInterrupts++;
cpuIntrPost(when);
}
}
@ -1226,9 +891,6 @@ NSGigE::devIntrClear(uint32_t interrupts)
postedRxOrn++;
}
if (regs.isr & regs.imr & ISR_IMPL)
postedInterrupts++;
interrupts &= ~ISR_NOIMPL;
regs.isr &= ~interrupts;

View file

@ -38,7 +38,6 @@
#define __DEV_NS_GIGE_HH__
#include "base/inet.hh"
#include "base/statistics.hh"
#include "dev/etherdevice.hh"
#include "dev/etherint.hh"
#include "dev/etherpkt.hh"
@ -372,60 +371,6 @@ class NSGigE : public EtherDevice
virtual void unserialize(Checkpoint *cp, const std::string &section);
virtual void resume();
public:
void regStats();
private:
Stats::Scalar<> txBytes;
Stats::Scalar<> rxBytes;
Stats::Scalar<> txPackets;
Stats::Scalar<> rxPackets;
Stats::Scalar<> txIpChecksums;
Stats::Scalar<> rxIpChecksums;
Stats::Scalar<> txTcpChecksums;
Stats::Scalar<> rxTcpChecksums;
Stats::Scalar<> txUdpChecksums;
Stats::Scalar<> rxUdpChecksums;
Stats::Scalar<> descDmaReads;
Stats::Scalar<> descDmaWrites;
Stats::Scalar<> descDmaRdBytes;
Stats::Scalar<> descDmaWrBytes;
Stats::Formula totBandwidth;
Stats::Formula totPackets;
Stats::Formula totBytes;
Stats::Formula totPacketRate;
Stats::Formula txBandwidth;
Stats::Formula rxBandwidth;
Stats::Formula txPacketRate;
Stats::Formula rxPacketRate;
Stats::Scalar<> postedSwi;
Stats::Formula coalescedSwi;
Stats::Scalar<> totalSwi;
Stats::Scalar<> postedRxIdle;
Stats::Formula coalescedRxIdle;
Stats::Scalar<> totalRxIdle;
Stats::Scalar<> postedRxOk;
Stats::Formula coalescedRxOk;
Stats::Scalar<> totalRxOk;
Stats::Scalar<> postedRxDesc;
Stats::Formula coalescedRxDesc;
Stats::Scalar<> totalRxDesc;
Stats::Scalar<> postedTxOk;
Stats::Formula coalescedTxOk;
Stats::Scalar<> totalTxOk;
Stats::Scalar<> postedTxIdle;
Stats::Formula coalescedTxIdle;
Stats::Scalar<> totalTxIdle;
Stats::Scalar<> postedTxDesc;
Stats::Formula coalescedTxDesc;
Stats::Scalar<> totalTxDesc;
Stats::Scalar<> postedRxOrn;
Stats::Formula coalescedRxOrn;
Stats::Scalar<> totalRxOrn;
Stats::Formula coalescedTotal;
Stats::Scalar<> postedInterrupts;
Stats::Scalar<> droppedPackets;
};
/*