Ethernet: share statistics between all ethernet devices and apply some
of those statistics to the e1000 model.
This commit is contained in:
Nathan Binkert
parent
87d03d00cd
commit
1099a9838a
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@ -46,6 +46,7 @@ if env['FULL_SYSTEM']:
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Source('baddev.cc')
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Source('disk_image.cc')
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Source('etherbus.cc')
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Source('etherdevice.cc')
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Source('etherdump.cc')
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Source('etherint.cc')
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Source('etherlink.cc')
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367
src/dev/etherdevice.cc
Normal file
367
src/dev/etherdevice.cc
Normal file
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@ -0,0 +1,367 @@
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/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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* Lisa Hsu
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*/
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#include "dev/etherdevice.hh"
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#include "sim/stats.hh"
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void
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EtherDevice::regStats()
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{
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txBytes
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.name(name() + ".txBytes")
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.desc("Bytes Transmitted")
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.prereq(txBytes)
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;
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rxBytes
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.name(name() + ".rxBytes")
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.desc("Bytes Received")
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.prereq(rxBytes)
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;
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txPackets
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.name(name() + ".txPackets")
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.desc("Number of Packets Transmitted")
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.prereq(txBytes)
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;
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rxPackets
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.name(name() + ".rxPackets")
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.desc("Number of Packets Received")
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.prereq(rxBytes)
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;
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txIpChecksums
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.name(name() + ".txIpChecksums")
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.desc("Number of tx IP Checksums done by device")
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.precision(0)
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.prereq(txBytes)
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;
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rxIpChecksums
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.name(name() + ".rxIpChecksums")
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.desc("Number of rx IP Checksums done by device")
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.precision(0)
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.prereq(rxBytes)
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;
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txTcpChecksums
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.name(name() + ".txTcpChecksums")
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.desc("Number of tx TCP Checksums done by device")
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.precision(0)
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.prereq(txBytes)
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;
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rxTcpChecksums
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.name(name() + ".rxTcpChecksums")
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.desc("Number of rx TCP Checksums done by device")
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.precision(0)
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.prereq(rxBytes)
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;
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txUdpChecksums
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.name(name() + ".txUdpChecksums")
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.desc("Number of tx UDP Checksums done by device")
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.precision(0)
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.prereq(txBytes)
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;
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rxUdpChecksums
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.name(name() + ".rxUdpChecksums")
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.desc("Number of rx UDP Checksums done by device")
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.precision(0)
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.prereq(rxBytes)
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;
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descDmaReads
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.name(name() + ".descDMAReads")
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.desc("Number of descriptors the device read w/ DMA")
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.precision(0)
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;
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descDmaWrites
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.name(name() + ".descDMAWrites")
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.desc("Number of descriptors the device wrote w/ DMA")
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.precision(0)
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;
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descDmaRdBytes
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.name(name() + ".descDmaReadBytes")
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.desc("number of descriptor bytes read w/ DMA")
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.precision(0)
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;
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descDmaWrBytes
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.name(name() + ".descDmaWriteBytes")
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.desc("number of descriptor bytes write w/ DMA")
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.precision(0)
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;
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txBandwidth
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.name(name() + ".txBandwidth")
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.desc("Transmit Bandwidth (bits/s)")
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.precision(0)
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.prereq(txBytes)
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;
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rxBandwidth
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.name(name() + ".rxBandwidth")
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.desc("Receive Bandwidth (bits/s)")
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.precision(0)
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.prereq(rxBytes)
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;
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totBandwidth
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.name(name() + ".totBandwidth")
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.desc("Total Bandwidth (bits/s)")
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.precision(0)
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.prereq(totBytes)
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;
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totPackets
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.name(name() + ".totPackets")
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.desc("Total Packets")
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.precision(0)
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.prereq(totBytes)
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;
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totBytes
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.name(name() + ".totBytes")
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.desc("Total Bytes")
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.precision(0)
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.prereq(totBytes)
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;
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totPacketRate
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.name(name() + ".totPPS")
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.desc("Total Tranmission Rate (packets/s)")
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.precision(0)
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.prereq(totBytes)
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;
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txPacketRate
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.name(name() + ".txPPS")
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.desc("Packet Tranmission Rate (packets/s)")
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.precision(0)
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.prereq(txBytes)
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;
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rxPacketRate
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.name(name() + ".rxPPS")
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.desc("Packet Reception Rate (packets/s)")
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.precision(0)
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.prereq(rxBytes)
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;
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postedSwi
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.name(name() + ".postedSwi")
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.desc("number of software interrupts posted to CPU")
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.precision(0)
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;
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totalSwi
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.name(name() + ".totalSwi")
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.desc("total number of Swi written to ISR")
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.precision(0)
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;
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coalescedSwi
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.name(name() + ".coalescedSwi")
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.desc("average number of Swi's coalesced into each post")
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.precision(0)
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;
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postedRxIdle
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.name(name() + ".postedRxIdle")
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.desc("number of rxIdle interrupts posted to CPU")
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.precision(0)
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;
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totalRxIdle
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.name(name() + ".totalRxIdle")
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.desc("total number of RxIdle written to ISR")
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.precision(0)
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;
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coalescedRxIdle
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.name(name() + ".coalescedRxIdle")
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.desc("average number of RxIdle's coalesced into each post")
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.precision(0)
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;
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postedRxOk
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.name(name() + ".postedRxOk")
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.desc("number of RxOk interrupts posted to CPU")
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.precision(0)
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;
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totalRxOk
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.name(name() + ".totalRxOk")
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.desc("total number of RxOk written to ISR")
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.precision(0)
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;
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coalescedRxOk
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.name(name() + ".coalescedRxOk")
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.desc("average number of RxOk's coalesced into each post")
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.precision(0)
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;
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postedRxDesc
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.name(name() + ".postedRxDesc")
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.desc("number of RxDesc interrupts posted to CPU")
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.precision(0)
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;
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totalRxDesc
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.name(name() + ".totalRxDesc")
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.desc("total number of RxDesc written to ISR")
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.precision(0)
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;
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coalescedRxDesc
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.name(name() + ".coalescedRxDesc")
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.desc("average number of RxDesc's coalesced into each post")
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.precision(0)
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;
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postedTxOk
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.name(name() + ".postedTxOk")
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.desc("number of TxOk interrupts posted to CPU")
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.precision(0)
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;
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totalTxOk
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.name(name() + ".totalTxOk")
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.desc("total number of TxOk written to ISR")
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.precision(0)
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;
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coalescedTxOk
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.name(name() + ".coalescedTxOk")
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.desc("average number of TxOk's coalesced into each post")
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.precision(0)
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;
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postedTxIdle
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.name(name() + ".postedTxIdle")
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.desc("number of TxIdle interrupts posted to CPU")
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.precision(0)
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;
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totalTxIdle
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.name(name() + ".totalTxIdle")
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.desc("total number of TxIdle written to ISR")
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.precision(0)
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;
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coalescedTxIdle
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.name(name() + ".coalescedTxIdle")
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.desc("average number of TxIdle's coalesced into each post")
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.precision(0)
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;
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postedTxDesc
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.name(name() + ".postedTxDesc")
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.desc("number of TxDesc interrupts posted to CPU")
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.precision(0)
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;
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totalTxDesc
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.name(name() + ".totalTxDesc")
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.desc("total number of TxDesc written to ISR")
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.precision(0)
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;
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coalescedTxDesc
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.name(name() + ".coalescedTxDesc")
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.desc("average number of TxDesc's coalesced into each post")
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.precision(0)
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;
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postedRxOrn
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.name(name() + ".postedRxOrn")
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.desc("number of RxOrn posted to CPU")
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.precision(0)
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;
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totalRxOrn
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.name(name() + ".totalRxOrn")
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.desc("total number of RxOrn written to ISR")
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.precision(0)
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;
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coalescedRxOrn
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.name(name() + ".coalescedRxOrn")
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.desc("average number of RxOrn's coalesced into each post")
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.precision(0)
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;
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coalescedTotal
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.name(name() + ".coalescedTotal")
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.desc("average number of interrupts coalesced into each post")
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.precision(0)
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;
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postedInterrupts
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.name(name() + ".postedInterrupts")
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.desc("number of posts to CPU")
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.precision(0)
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;
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droppedPackets
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.name(name() + ".droppedPackets")
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.desc("number of packets dropped")
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.precision(0)
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;
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coalescedSwi = totalSwi / postedInterrupts;
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coalescedRxIdle = totalRxIdle / postedInterrupts;
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coalescedRxOk = totalRxOk / postedInterrupts;
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coalescedRxDesc = totalRxDesc / postedInterrupts;
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coalescedTxOk = totalTxOk / postedInterrupts;
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coalescedTxIdle = totalTxIdle / postedInterrupts;
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coalescedTxDesc = totalTxDesc / postedInterrupts;
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coalescedRxOrn = totalRxOrn / postedInterrupts;
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coalescedTotal = (totalSwi + totalRxIdle + totalRxOk + totalRxDesc +
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totalTxOk + totalTxIdle + totalTxDesc +
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totalRxOrn) / postedInterrupts;
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txBandwidth = txBytes * Stats::constant(8) / simSeconds;
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rxBandwidth = rxBytes * Stats::constant(8) / simSeconds;
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totBandwidth = txBandwidth + rxBandwidth;
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totBytes = txBytes + rxBytes;
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totPackets = txPackets + rxPackets;
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txPacketRate = txPackets / simSeconds;
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rxPacketRate = rxPackets / simSeconds;
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}
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@ -36,6 +36,7 @@
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#ifndef __DEV_ETHERDEVICE_HH__
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#define __DEV_ETHERDEVICE_HH__
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#include "base/statistics.hh"
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#include "dev/pcidev.hh"
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#include "params/EtherDevice.hh"
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#include "sim/sim_object.hh"
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@ -64,6 +65,59 @@ class EtherDevice : public PciDev
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/** Additional function to return the Port of a memory object. */
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virtual EtherInt *getEthPort(const std::string &if_name, int idx = -1) = 0;
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public:
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void regStats();
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protected:
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Stats::Scalar<> txBytes;
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Stats::Scalar<> rxBytes;
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Stats::Scalar<> txPackets;
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Stats::Scalar<> rxPackets;
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Stats::Scalar<> txIpChecksums;
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Stats::Scalar<> rxIpChecksums;
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Stats::Scalar<> txTcpChecksums;
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Stats::Scalar<> rxTcpChecksums;
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Stats::Scalar<> txUdpChecksums;
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Stats::Scalar<> rxUdpChecksums;
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Stats::Scalar<> descDmaReads;
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Stats::Scalar<> descDmaWrites;
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Stats::Scalar<> descDmaRdBytes;
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Stats::Scalar<> descDmaWrBytes;
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Stats::Formula totBandwidth;
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Stats::Formula totPackets;
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Stats::Formula totBytes;
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Stats::Formula totPacketRate;
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Stats::Formula txBandwidth;
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Stats::Formula rxBandwidth;
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Stats::Formula txPacketRate;
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Stats::Formula rxPacketRate;
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Stats::Scalar<> postedSwi;
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Stats::Formula coalescedSwi;
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Stats::Scalar<> totalSwi;
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Stats::Scalar<> postedRxIdle;
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Stats::Formula coalescedRxIdle;
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Stats::Scalar<> totalRxIdle;
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Stats::Scalar<> postedRxOk;
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Stats::Formula coalescedRxOk;
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Stats::Scalar<> totalRxOk;
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Stats::Scalar<> postedRxDesc;
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Stats::Formula coalescedRxDesc;
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Stats::Scalar<> totalRxDesc;
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Stats::Scalar<> postedTxOk;
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Stats::Formula coalescedTxOk;
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Stats::Scalar<> totalTxOk;
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Stats::Scalar<> postedTxIdle;
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Stats::Formula coalescedTxIdle;
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Stats::Scalar<> totalTxIdle;
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Stats::Scalar<> postedTxDesc;
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Stats::Formula coalescedTxDesc;
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Stats::Scalar<> totalTxDesc;
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Stats::Scalar<> postedRxOrn;
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Stats::Formula coalescedRxOrn;
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Stats::Scalar<> totalRxOrn;
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Stats::Formula coalescedTotal;
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Stats::Scalar<> postedInterrupts;
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Stats::Scalar<> droppedPackets;
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};
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#endif //__DEV_ETHERDEVICE_HH__
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|
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@ -584,6 +584,7 @@ IGbE::postInterrupt(IntTypes t, bool now)
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if (interEvent.scheduled()) {
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interEvent.deschedule();
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}
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postedInterrupts++;
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cpuPostInt();
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} else {
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DPRINTF(EthernetIntr, "EINT: Scheduling timer interrupt for %d ticks\n",
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@ -740,6 +741,7 @@ IGbE::RxDescCache::pktComplete()
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DPRINTF(EthernetDesc, "Checking IP checksum\n");
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status |= RXDS_IPCS;
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desc->csum = htole(cksum(ip));
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igbe->rxIpChecksums++;
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if (cksum(ip) != 0) {
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err |= RXDE_IPE;
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DPRINTF(EthernetDesc, "Checksum is bad!!\n");
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@ -750,6 +752,7 @@ IGbE::RxDescCache::pktComplete()
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DPRINTF(EthernetDesc, "Checking TCP checksum\n");
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status |= RXDS_TCPCS;
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desc->csum = htole(cksum(tcp));
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igbe->rxTcpChecksums++;
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if (cksum(tcp) != 0) {
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DPRINTF(EthernetDesc, "Checksum is bad!!\n");
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err |= RXDE_TCPE;
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@ -761,6 +764,7 @@ IGbE::RxDescCache::pktComplete()
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DPRINTF(EthernetDesc, "Checking UDP checksum\n");
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status |= RXDS_UDPCS;
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desc->csum = htole(cksum(udp));
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igbe->rxUdpChecksums++;
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if (cksum(udp) != 0) {
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DPRINTF(EthernetDesc, "Checksum is bad!!\n");
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err |= RXDE_TCPE;
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@ -994,6 +998,7 @@ IGbE::TxDescCache::pktComplete()
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if (TxdOp::ixsm(desc)) {
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ip->sum(0);
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ip->sum(cksum(ip));
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igbe->txIpChecksums++;
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DPRINTF(EthernetDesc, "Calculated IP checksum\n");
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}
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if (TxdOp::txsm(desc)) {
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@ -1002,11 +1007,13 @@ IGbE::TxDescCache::pktComplete()
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if (tcp) {
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tcp->sum(0);
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tcp->sum(cksum(tcp));
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igbe->txTcpChecksums++;
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DPRINTF(EthernetDesc, "Calculated TCP checksum\n");
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} else if (udp) {
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assert(udp);
|
||||
udp->sum(0);
|
||||
udp->sum(cksum(udp));
|
||||
igbe->txUdpChecksums++;
|
||||
DPRINTF(EthernetDesc, "Calculated UDP checksum\n");
|
||||
} else {
|
||||
panic("Told to checksum, but don't know how\n");
|
||||
|
|
@ -1247,6 +1254,9 @@ IGbE::txStateMachine()
|
|||
bool
|
||||
IGbE::ethRxPkt(EthPacketPtr pkt)
|
||||
{
|
||||
rxBytes += pkt->length;
|
||||
rxPackets++;
|
||||
|
||||
DPRINTF(Ethernet, "RxFIFO: Receiving pcakte from wire\n");
|
||||
|
||||
if (!regs.rctl.en()) {
|
||||
|
|
@ -1380,6 +1390,10 @@ IGbE::txWire()
|
|||
}
|
||||
DPRINTF(EthernetSM, "TxFIFO: Successful transmit, bytes available in fifo: %d\n",
|
||||
txFifo.avail());
|
||||
|
||||
txBytes += txFifo.front()->length;
|
||||
txPackets++;
|
||||
|
||||
txFifo.pop();
|
||||
} else {
|
||||
// We'll get woken up when the packet ethTxDone() gets called
|
||||
|
|
|
|||
|
|
@ -39,7 +39,6 @@
|
|||
#include <string>
|
||||
|
||||
#include "base/inet.hh"
|
||||
#include "base/statistics.hh"
|
||||
#include "dev/etherdevice.hh"
|
||||
#include "dev/etherint.hh"
|
||||
#include "dev/etherpkt.hh"
|
||||
|
|
|
|||
|
|
@ -46,7 +46,6 @@
|
|||
#include "params/NSGigE.hh"
|
||||
#include "sim/debug.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "sim/stats.hh"
|
||||
#include "sim/system.hh"
|
||||
|
||||
const char *NsRxStateStrings[] =
|
||||
|
|
@ -131,341 +130,6 @@ NSGigE::NSGigE(Params *p)
|
|||
NSGigE::~NSGigE()
|
||||
{}
|
||||
|
||||
void
|
||||
NSGigE::regStats()
|
||||
{
|
||||
txBytes
|
||||
.name(name() + ".txBytes")
|
||||
.desc("Bytes Transmitted")
|
||||
.prereq(txBytes)
|
||||
;
|
||||
|
||||
rxBytes
|
||||
.name(name() + ".rxBytes")
|
||||
.desc("Bytes Received")
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
|
||||
txPackets
|
||||
.name(name() + ".txPackets")
|
||||
.desc("Number of Packets Transmitted")
|
||||
.prereq(txBytes)
|
||||
;
|
||||
|
||||
rxPackets
|
||||
.name(name() + ".rxPackets")
|
||||
.desc("Number of Packets Received")
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
|
||||
txIpChecksums
|
||||
.name(name() + ".txIpChecksums")
|
||||
.desc("Number of tx IP Checksums done by device")
|
||||
.precision(0)
|
||||
.prereq(txBytes)
|
||||
;
|
||||
|
||||
rxIpChecksums
|
||||
.name(name() + ".rxIpChecksums")
|
||||
.desc("Number of rx IP Checksums done by device")
|
||||
.precision(0)
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
|
||||
txTcpChecksums
|
||||
.name(name() + ".txTcpChecksums")
|
||||
.desc("Number of tx TCP Checksums done by device")
|
||||
.precision(0)
|
||||
.prereq(txBytes)
|
||||
;
|
||||
|
||||
rxTcpChecksums
|
||||
.name(name() + ".rxTcpChecksums")
|
||||
.desc("Number of rx TCP Checksums done by device")
|
||||
.precision(0)
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
|
||||
txUdpChecksums
|
||||
.name(name() + ".txUdpChecksums")
|
||||
.desc("Number of tx UDP Checksums done by device")
|
||||
.precision(0)
|
||||
.prereq(txBytes)
|
||||
;
|
||||
|
||||
rxUdpChecksums
|
||||
.name(name() + ".rxUdpChecksums")
|
||||
.desc("Number of rx UDP Checksums done by device")
|
||||
.precision(0)
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
|
||||
descDmaReads
|
||||
.name(name() + ".descDMAReads")
|
||||
.desc("Number of descriptors the device read w/ DMA")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
descDmaWrites
|
||||
.name(name() + ".descDMAWrites")
|
||||
.desc("Number of descriptors the device wrote w/ DMA")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
descDmaRdBytes
|
||||
.name(name() + ".descDmaReadBytes")
|
||||
.desc("number of descriptor bytes read w/ DMA")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
descDmaWrBytes
|
||||
.name(name() + ".descDmaWriteBytes")
|
||||
.desc("number of descriptor bytes write w/ DMA")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
txBandwidth
|
||||
.name(name() + ".txBandwidth")
|
||||
.desc("Transmit Bandwidth (bits/s)")
|
||||
.precision(0)
|
||||
.prereq(txBytes)
|
||||
;
|
||||
|
||||
rxBandwidth
|
||||
.name(name() + ".rxBandwidth")
|
||||
.desc("Receive Bandwidth (bits/s)")
|
||||
.precision(0)
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
|
||||
totBandwidth
|
||||
.name(name() + ".totBandwidth")
|
||||
.desc("Total Bandwidth (bits/s)")
|
||||
.precision(0)
|
||||
.prereq(totBytes)
|
||||
;
|
||||
|
||||
totPackets
|
||||
.name(name() + ".totPackets")
|
||||
.desc("Total Packets")
|
||||
.precision(0)
|
||||
.prereq(totBytes)
|
||||
;
|
||||
|
||||
totBytes
|
||||
.name(name() + ".totBytes")
|
||||
.desc("Total Bytes")
|
||||
.precision(0)
|
||||
.prereq(totBytes)
|
||||
;
|
||||
|
||||
totPacketRate
|
||||
.name(name() + ".totPPS")
|
||||
.desc("Total Tranmission Rate (packets/s)")
|
||||
.precision(0)
|
||||
.prereq(totBytes)
|
||||
;
|
||||
|
||||
txPacketRate
|
||||
.name(name() + ".txPPS")
|
||||
.desc("Packet Tranmission Rate (packets/s)")
|
||||
.precision(0)
|
||||
.prereq(txBytes)
|
||||
;
|
||||
|
||||
rxPacketRate
|
||||
.name(name() + ".rxPPS")
|
||||
.desc("Packet Reception Rate (packets/s)")
|
||||
.precision(0)
|
||||
.prereq(rxBytes)
|
||||
;
|
||||
|
||||
postedSwi
|
||||
.name(name() + ".postedSwi")
|
||||
.desc("number of software interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
totalSwi
|
||||
.name(name() + ".totalSwi")
|
||||
.desc("total number of Swi written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
coalescedSwi
|
||||
.name(name() + ".coalescedSwi")
|
||||
.desc("average number of Swi's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
postedRxIdle
|
||||
.name(name() + ".postedRxIdle")
|
||||
.desc("number of rxIdle interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
totalRxIdle
|
||||
.name(name() + ".totalRxIdle")
|
||||
.desc("total number of RxIdle written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
coalescedRxIdle
|
||||
.name(name() + ".coalescedRxIdle")
|
||||
.desc("average number of RxIdle's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
postedRxOk
|
||||
.name(name() + ".postedRxOk")
|
||||
.desc("number of RxOk interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
totalRxOk
|
||||
.name(name() + ".totalRxOk")
|
||||
.desc("total number of RxOk written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
coalescedRxOk
|
||||
.name(name() + ".coalescedRxOk")
|
||||
.desc("average number of RxOk's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
postedRxDesc
|
||||
.name(name() + ".postedRxDesc")
|
||||
.desc("number of RxDesc interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
totalRxDesc
|
||||
.name(name() + ".totalRxDesc")
|
||||
.desc("total number of RxDesc written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
coalescedRxDesc
|
||||
.name(name() + ".coalescedRxDesc")
|
||||
.desc("average number of RxDesc's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
postedTxOk
|
||||
.name(name() + ".postedTxOk")
|
||||
.desc("number of TxOk interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
totalTxOk
|
||||
.name(name() + ".totalTxOk")
|
||||
.desc("total number of TxOk written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
coalescedTxOk
|
||||
.name(name() + ".coalescedTxOk")
|
||||
.desc("average number of TxOk's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
postedTxIdle
|
||||
.name(name() + ".postedTxIdle")
|
||||
.desc("number of TxIdle interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
totalTxIdle
|
||||
.name(name() + ".totalTxIdle")
|
||||
.desc("total number of TxIdle written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
coalescedTxIdle
|
||||
.name(name() + ".coalescedTxIdle")
|
||||
.desc("average number of TxIdle's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
postedTxDesc
|
||||
.name(name() + ".postedTxDesc")
|
||||
.desc("number of TxDesc interrupts posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
totalTxDesc
|
||||
.name(name() + ".totalTxDesc")
|
||||
.desc("total number of TxDesc written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
coalescedTxDesc
|
||||
.name(name() + ".coalescedTxDesc")
|
||||
.desc("average number of TxDesc's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
postedRxOrn
|
||||
.name(name() + ".postedRxOrn")
|
||||
.desc("number of RxOrn posted to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
totalRxOrn
|
||||
.name(name() + ".totalRxOrn")
|
||||
.desc("total number of RxOrn written to ISR")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
coalescedRxOrn
|
||||
.name(name() + ".coalescedRxOrn")
|
||||
.desc("average number of RxOrn's coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
coalescedTotal
|
||||
.name(name() + ".coalescedTotal")
|
||||
.desc("average number of interrupts coalesced into each post")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
postedInterrupts
|
||||
.name(name() + ".postedInterrupts")
|
||||
.desc("number of posts to CPU")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
droppedPackets
|
||||
.name(name() + ".droppedPackets")
|
||||
.desc("number of packets dropped")
|
||||
.precision(0)
|
||||
;
|
||||
|
||||
coalescedSwi = totalSwi / postedInterrupts;
|
||||
coalescedRxIdle = totalRxIdle / postedInterrupts;
|
||||
coalescedRxOk = totalRxOk / postedInterrupts;
|
||||
coalescedRxDesc = totalRxDesc / postedInterrupts;
|
||||
coalescedTxOk = totalTxOk / postedInterrupts;
|
||||
coalescedTxIdle = totalTxIdle / postedInterrupts;
|
||||
coalescedTxDesc = totalTxDesc / postedInterrupts;
|
||||
coalescedRxOrn = totalRxOrn / postedInterrupts;
|
||||
|
||||
coalescedTotal = (totalSwi + totalRxIdle + totalRxOk + totalRxDesc +
|
||||
totalTxOk + totalTxIdle + totalTxDesc +
|
||||
totalRxOrn) / postedInterrupts;
|
||||
|
||||
txBandwidth = txBytes * Stats::constant(8) / simSeconds;
|
||||
rxBandwidth = rxBytes * Stats::constant(8) / simSeconds;
|
||||
totBandwidth = txBandwidth + rxBandwidth;
|
||||
totBytes = txBytes + rxBytes;
|
||||
totPackets = txPackets + rxPackets;
|
||||
|
||||
txPacketRate = txPackets / simSeconds;
|
||||
rxPacketRate = rxPackets / simSeconds;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* This is to write to the PCI general configuration registers
|
||||
*/
|
||||
|
|
@ -1186,6 +850,7 @@ NSGigE::devIntrPost(uint32_t interrupts)
|
|||
Tick when = curTick;
|
||||
if ((regs.isr & regs.imr & ISR_NODELAY) == 0)
|
||||
when += intrDelay;
|
||||
postedInterrupts++;
|
||||
cpuIntrPost(when);
|
||||
}
|
||||
}
|
||||
|
|
@ -1226,9 +891,6 @@ NSGigE::devIntrClear(uint32_t interrupts)
|
|||
postedRxOrn++;
|
||||
}
|
||||
|
||||
if (regs.isr & regs.imr & ISR_IMPL)
|
||||
postedInterrupts++;
|
||||
|
||||
interrupts &= ~ISR_NOIMPL;
|
||||
regs.isr &= ~interrupts;
|
||||
|
||||
|
|
|
|||
|
|
@ -38,7 +38,6 @@
|
|||
#define __DEV_NS_GIGE_HH__
|
||||
|
||||
#include "base/inet.hh"
|
||||
#include "base/statistics.hh"
|
||||
#include "dev/etherdevice.hh"
|
||||
#include "dev/etherint.hh"
|
||||
#include "dev/etherpkt.hh"
|
||||
|
|
@ -372,60 +371,6 @@ class NSGigE : public EtherDevice
|
|||
virtual void unserialize(Checkpoint *cp, const std::string §ion);
|
||||
|
||||
virtual void resume();
|
||||
|
||||
public:
|
||||
void regStats();
|
||||
|
||||
private:
|
||||
Stats::Scalar<> txBytes;
|
||||
Stats::Scalar<> rxBytes;
|
||||
Stats::Scalar<> txPackets;
|
||||
Stats::Scalar<> rxPackets;
|
||||
Stats::Scalar<> txIpChecksums;
|
||||
Stats::Scalar<> rxIpChecksums;
|
||||
Stats::Scalar<> txTcpChecksums;
|
||||
Stats::Scalar<> rxTcpChecksums;
|
||||
Stats::Scalar<> txUdpChecksums;
|
||||
Stats::Scalar<> rxUdpChecksums;
|
||||
Stats::Scalar<> descDmaReads;
|
||||
Stats::Scalar<> descDmaWrites;
|
||||
Stats::Scalar<> descDmaRdBytes;
|
||||
Stats::Scalar<> descDmaWrBytes;
|
||||
Stats::Formula totBandwidth;
|
||||
Stats::Formula totPackets;
|
||||
Stats::Formula totBytes;
|
||||
Stats::Formula totPacketRate;
|
||||
Stats::Formula txBandwidth;
|
||||
Stats::Formula rxBandwidth;
|
||||
Stats::Formula txPacketRate;
|
||||
Stats::Formula rxPacketRate;
|
||||
Stats::Scalar<> postedSwi;
|
||||
Stats::Formula coalescedSwi;
|
||||
Stats::Scalar<> totalSwi;
|
||||
Stats::Scalar<> postedRxIdle;
|
||||
Stats::Formula coalescedRxIdle;
|
||||
Stats::Scalar<> totalRxIdle;
|
||||
Stats::Scalar<> postedRxOk;
|
||||
Stats::Formula coalescedRxOk;
|
||||
Stats::Scalar<> totalRxOk;
|
||||
Stats::Scalar<> postedRxDesc;
|
||||
Stats::Formula coalescedRxDesc;
|
||||
Stats::Scalar<> totalRxDesc;
|
||||
Stats::Scalar<> postedTxOk;
|
||||
Stats::Formula coalescedTxOk;
|
||||
Stats::Scalar<> totalTxOk;
|
||||
Stats::Scalar<> postedTxIdle;
|
||||
Stats::Formula coalescedTxIdle;
|
||||
Stats::Scalar<> totalTxIdle;
|
||||
Stats::Scalar<> postedTxDesc;
|
||||
Stats::Formula coalescedTxDesc;
|
||||
Stats::Scalar<> totalTxDesc;
|
||||
Stats::Scalar<> postedRxOrn;
|
||||
Stats::Formula coalescedRxOrn;
|
||||
Stats::Scalar<> totalRxOrn;
|
||||
Stats::Formula coalescedTotal;
|
||||
Stats::Scalar<> postedInterrupts;
|
||||
Stats::Scalar<> droppedPackets;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in a new issue