Regression: Set the clock for twosys-tsunami CPUs
This patch merely adds a clock other than the default 1 Tick for the CPUs of both the test system and drive system for the twosys-tsunami regression. The CPU frequency of the driver system is choosed to be twice that of the test system to ensure it is not the bottleneck (although in this case it mostly serves as a demonstration of a two-system setup),
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@ -38,6 +38,7 @@ test_sys.cpu = AtomicSimpleCPU(cpu_id=0)
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# create the interrupt controller
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# create the interrupt controller
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test_sys.cpu.createInterruptController()
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test_sys.cpu.createInterruptController()
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test_sys.cpu.connectAllPorts(test_sys.membus)
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test_sys.cpu.connectAllPorts(test_sys.membus)
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test_sys.cpu.clock = '2GHz'
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# In contrast to the other (one-system) Tsunami configurations we do
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# In contrast to the other (one-system) Tsunami configurations we do
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# not have an IO cache but instead rely on an IO bridge for accesses
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# not have an IO cache but instead rely on an IO bridge for accesses
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# from masters on the IO bus to the memory bus
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# from masters on the IO bus to the memory bus
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@ -51,6 +52,7 @@ drive_sys.cpu = AtomicSimpleCPU(cpu_id=0)
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# create the interrupt controller
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# create the interrupt controller
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drive_sys.cpu.createInterruptController()
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drive_sys.cpu.createInterruptController()
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drive_sys.cpu.connectAllPorts(drive_sys.membus)
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drive_sys.cpu.connectAllPorts(drive_sys.membus)
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drive_sys.cpu.clock = '4GHz'
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drive_sys.iobridge = Bridge(delay='50ns', ranges = [AddrRange(0, '8GB')])
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drive_sys.iobridge = Bridge(delay='50ns', ranges = [AddrRange(0, '8GB')])
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drive_sys.iobridge.slave = drive_sys.iobus.master
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drive_sys.iobridge.slave = drive_sys.iobus.master
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drive_sys.iobridge.master = drive_sys.membus.slave
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drive_sys.iobridge.master = drive_sys.membus.slave
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