cpu: add more instruction mix statistics

For the o3, add instruction mix (OpClass) histogram at commit (stats
also already collected at issue). For the simple CPUs we add a
histogram of executed instructions
This commit is contained in:
Curtis Dunham 2014-05-09 18:58:47 -04:00
parent a15b713cba
commit 1028c03320
4 changed files with 26 additions and 0 deletions

View file

@ -532,6 +532,8 @@ class DefaultCommit
Stats::Vector statComInteger; Stats::Vector statComInteger;
/** Total number of function calls */ /** Total number of function calls */
Stats::Vector statComFunctionCalls; Stats::Vector statComFunctionCalls;
/** Committed instructions by instruction type (OpClass) */
Stats::Vector2d statCommittedInstType;
/** Number of cycles where the commit bandwidth limit is reached. */ /** Number of cycles where the commit bandwidth limit is reached. */
Stats::Scalar commitEligibleSamples; Stats::Scalar commitEligibleSamples;

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@ -273,6 +273,14 @@ DefaultCommit<Impl>::regStats()
.flags(total) .flags(total)
; ;
statCommittedInstType
.init(numThreads,Enums::Num_OpClass)
.name(name() + ".op_class")
.desc("Class of committed instruction")
.flags(total | pdf | dist)
;
statCommittedInstType.ysubnames(Enums::OpClassStrings);
commitEligible commitEligible
.init(cpu->numThreads) .init(cpu->numThreads)
.name(name() + ".bw_limited") .name(name() + ".bw_limited")
@ -1032,6 +1040,7 @@ DefaultCommit<Impl>::commitInsts()
if (commit_success) { if (commit_success) {
++num_committed; ++num_committed;
statCommittedInstType[tid][head_inst->opClass()]++;
ppCommit->notify(head_inst); ppCommit->notify(head_inst);
changedROBNumEntries[tid] = true; changedROBNumEntries[tid] = true;

View file

@ -286,6 +286,16 @@ BaseSimpleCPU::regStats()
.prereq(dcacheRetryCycles) .prereq(dcacheRetryCycles)
; ;
statExecutedInstType
.init(Enums::Num_OpClass)
.name(name() + ".op_class")
.desc("Class of executed instruction")
.flags(total | pdf | dist)
;
for (unsigned i = 0; i < Num_OpClasses; ++i) {
statExecutedInstType.subname(i, Enums::OpClassStrings[i]);
}
idleFraction = constant(1.0) - notIdleFraction; idleFraction = constant(1.0) - notIdleFraction;
numIdleCycles = idleFraction * numCycles; numIdleCycles = idleFraction * numCycles;
numBusyCycles = (notIdleFraction)*numCycles; numBusyCycles = (notIdleFraction)*numCycles;
@ -532,6 +542,8 @@ BaseSimpleCPU::postExecute()
} }
/* End power model statistics */ /* End power model statistics */
statExecutedInstType[curStaticInst->opClass()]++;
if (FullSystem) if (FullSystem)
traceFunctions(instAddr); traceFunctions(instAddr);

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@ -283,6 +283,9 @@ class BaseSimpleCPU : public BaseCPU
Stats::Scalar numBranchMispred; Stats::Scalar numBranchMispred;
/// @} /// @}
// instruction mix histogram by OpClass
Stats::Vector statExecutedInstType;
void serializeThread(std::ostream &os, ThreadID tid); void serializeThread(std::ostream &os, ThreadID tid);
void unserializeThread(Checkpoint *cp, const std::string &section, void unserializeThread(Checkpoint *cp, const std::string &section,
ThreadID tid); ThreadID tid);