ARM: Fix type comparison warnings in Neon.
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@ -1718,7 +1718,7 @@ let {{
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destElem = (srcElem1 >> shiftAmt);
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}
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// Make sure the right shift sign extended when it should.
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if (srcElem1 < 0 && destElem >= 0) {
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if (ltz(srcElem1) && !ltz(destElem)) {
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destElem |= -((Element)1 << (sizeof(Element) * 8 -
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1 - shiftAmt));
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}
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@ -1740,7 +1740,7 @@ let {{
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Element rBit = 0;
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if (shiftAmt <= sizeof(Element) * 8)
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rBit = bits(srcElem1, shiftAmt - 1);
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if (shiftAmt > sizeof(Element) * 8 && srcElem1 < 0)
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if (shiftAmt > sizeof(Element) * 8 && ltz(srcElem1))
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rBit = 1;
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if (shiftAmt >= sizeof(Element) * 8) {
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shiftAmt = sizeof(Element) * 8 - 1;
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@ -1749,7 +1749,7 @@ let {{
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destElem = (srcElem1 >> shiftAmt);
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}
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// Make sure the right shift sign extended when it should.
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if (srcElem1 < 0 && destElem >= 0) {
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if (ltz(srcElem1) && !ltz(destElem)) {
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destElem |= -((Element)1 << (sizeof(Element) * 8 -
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1 - shiftAmt));
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}
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@ -1778,11 +1778,6 @@ let {{
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} else {
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destElem = (srcElem1 >> shiftAmt);
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}
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// Make sure the right shift sign extended when it should.
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if (srcElem1 < 0 && destElem >= 0) {
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destElem |= -((Element)1 << (sizeof(Element) * 8 -
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1 - shiftAmt));
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}
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} else if (shiftAmt > 0) {
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if (shiftAmt >= sizeof(Element) * 8) {
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if (srcElem1 != 0) {
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@ -1862,19 +1857,12 @@ let {{
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Element rBit = 0;
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if (shiftAmt <= sizeof(Element) * 8)
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rBit = bits(srcElem1, shiftAmt - 1);
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if (shiftAmt > sizeof(Element) * 8 && srcElem1 < 0)
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rBit = 1;
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if (shiftAmt >= sizeof(Element) * 8) {
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shiftAmt = sizeof(Element) * 8 - 1;
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destElem = 0;
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} else {
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destElem = (srcElem1 >> shiftAmt);
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}
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// Make sure the right shift sign extended when it should.
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if (srcElem1 < 0 && destElem >= 0) {
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destElem |= -((Element)1 << (sizeof(Element) * 8 -
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1 - shiftAmt));
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}
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destElem += rBit;
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} else {
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if (shiftAmt >= sizeof(Element) * 8) {
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@ -2014,10 +2002,10 @@ let {{
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midElem = ~((BigElement)maxNeg << (sizeof(Element) * 8));
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fpscr.qc = 1;
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}
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bool negPreDest = (destElem < 0);
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bool negPreDest = ltz(destElem);
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destElem += midElem;
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bool negDest = (destElem < 0);
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bool negMid = (midElem < 0);
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bool negDest = ltz(destElem);
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bool negMid = ltz(midElem);
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if (negPreDest == negMid && negMid != negDest) {
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destElem = mask(sizeof(BigElement) * 8 - 1);
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if (negPreDest)
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@ -2039,10 +2027,10 @@ let {{
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midElem = ~((BigElement)maxNeg << (sizeof(Element) * 8));
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fpscr.qc = 1;
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}
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bool negPreDest = (destElem < 0);
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bool negPreDest = ltz(destElem);
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destElem -= midElem;
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bool negDest = (destElem < 0);
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bool posMid = (midElem > 0);
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bool negDest = ltz(destElem);
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bool posMid = ltz((BigElement)-midElem);
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if (negPreDest == posMid && posMid != negDest) {
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destElem = mask(sizeof(BigElement) * 8 - 1);
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if (negPreDest)
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@ -2361,7 +2349,7 @@ let {{
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vshrCode = '''
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if (imm >= sizeof(srcElem1) * 8) {
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if (srcElem1 < 0)
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if (ltz(srcElem1))
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destElem = -1;
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else
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destElem = 0;
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@ -2375,10 +2363,10 @@ let {{
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vsraCode = '''
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Element mid;;
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if (imm >= sizeof(srcElem1) * 8) {
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mid = (srcElem1 < 0) ? -1 : 0;
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mid = ltz(srcElem1) ? -1 : 0;
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} else {
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mid = srcElem1 >> imm;
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if (srcElem1 < 0 && mid >= 0) {
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if (ltz(srcElem1) && !ltz(mid)) {
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mid |= -(mid & ((Element)1 <<
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(sizeof(Element) * 8 - 1 - imm)));
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}
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@ -2686,8 +2674,6 @@ let {{
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} else {
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if (srcElem1 != (Element)srcElem1) {
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destElem = mask(sizeof(Element) * 8 - 1);
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if (srcElem1 < 0)
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destElem = ~destElem;
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fpscr.qc = 1;
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} else {
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destElem = srcElem1;
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@ -142,6 +142,32 @@ def template NeonExecDeclare {{
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%(CPU_exec_context)s *, Trace::InstRecord *) const;
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}};
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output header {{
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template <class T>
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// Implement a less-than-zero function: ltz()
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// this function exists because some versions of GCC complain when a
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// comparison is done between a unsigned variable and 0 and for GCC 4.2
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// there is no way to disable this warning
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inline bool ltz(T t);
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template <>
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inline bool ltz(uint8_t) { return false; }
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template <>
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inline bool ltz(uint16_t) { return false; }
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template <>
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inline bool ltz(uint32_t) { return false; }
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template <>
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inline bool ltz(uint64_t) { return false; }
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template <>
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inline bool ltz(int8_t v) { return v < 0; }
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template <>
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inline bool ltz(int16_t v) { return v < 0; }
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template <>
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inline bool ltz(int32_t v) { return v < 0; }
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template <>
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inline bool ltz(int64_t v) { return v < 0; }
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}};
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def template NeonEqualRegExecute {{
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template <class Element>
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Fault %(class_name)s<Element>::execute(%(CPU_exec_context)s *xc,
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