arch, x86: Delete packet in IntDevice::recvResponse

IntDevice::recvResponse is called from two places in current mainline: (1) the
short circuit path of X86ISA::IntDevice::IntMasterPort::sendMessage for atomic
mode, and (2) the full request->response path to and from the x86 interrupts
device (finally called from MessageMasterPort::recvTimingResp). In the former
case, the packet was deleted correctly, but in the latter case, the packet and
request leak. To fix the leak, move request and packet deletion into IntDevice
inherited class implementations of recvResponse.

src/dev/x86/i82094aa.cc

@@ -87,6 +87,15 @@ X86ISA::I82094AA::getIntAddrRange() const
     return ranges;
 }
 
+Tick
+X86ISA::I82094AA::recvResponse(PacketPtr pkt)
+{
+    // Packet instantiated calling sendMessage() in signalInterrupt()
+    delete pkt->req;
+    delete pkt;
+    return 0;
+}
+
 Tick
 X86ISA::I82094AA::read(PacketPtr pkt)
 {

src/dev/x86/i82094aa.hh

@@ -105,6 +105,8 @@ class I82094AA : public BasicPioDevice, public IntDevice
     BaseMasterPort &getMasterPort(const std::string &if_name,
                                   PortID idx = InvalidPortID);
 
+    Tick recvResponse(PacketPtr pkt) M5_ATTR_OVERRIDE;
+
     void signalInterrupt(int line);
     void raiseInterruptPin(int number);
     void lowerInterruptPin(int number);

src/dev/x86/intdev.cc

@@ -59,8 +59,6 @@ X86ISA::IntDevice::IntMasterPort::sendMessage(ApicList apics,
             assert(pkt->isResponse());
             // also ignore the latency in handling the response
             recvResponse(pkt);
-            delete pkt->req;
-            delete pkt;
         }
     }
 }

src/dev/x86/intdev.hh

@@ -150,6 +150,7 @@ class IntDevice
     virtual Tick
     recvResponse(PacketPtr pkt)
     {
+        panic("recvResponse not implemented.\n");
         return 0;
     }