Break a lot of overly long lines.
Factor out some asserts that were on both sides of an if/else. --HG-- extra : convert_revision : 78f0c2d76a81a98216b2f281159c6b6ea0147731
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1 changed files with 73 additions and 46 deletions
113
src/mem/cache/cache_impl.hh
vendored
113
src/mem/cache/cache_impl.hh
vendored
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@ -197,7 +197,8 @@ Cache<TagStore,Buffering,Coherence>::access(PacketPtr &pkt)
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/** @todo make the fast write alloc (wh64) work with coherence. */
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/** @todo Do we want to do fast writes for writebacks as well? */
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if (!blk && pkt->getSize() >= blkSize && coherence->allowFastWrites() &&
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(pkt->cmd == Packet::WriteReq || pkt->cmd == Packet::WriteInvalidateReq) ) {
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(pkt->cmd == Packet::WriteReq
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|| pkt->cmd == Packet::WriteInvalidateReq) ) {
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// not outstanding misses, can do this
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MSHR* outstanding_miss = missQueue->findMSHR(pkt->getAddr());
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if (pkt->cmd == Packet::WriteInvalidateReq || !outstanding_miss) {
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@ -254,7 +255,8 @@ Cache<TagStore,Buffering,Coherence>::getPacket()
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Packet * pkt = missQueue->getPacket();
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if (pkt) {
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if (!pkt->req->isUncacheable()) {
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if (pkt->cmd == Packet::HardPFReq) misses[Packet::HardPFReq][0/*pkt->req->getThreadNum()*/]++;
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if (pkt->cmd == Packet::HardPFReq)
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misses[Packet::HardPFReq][0/*pkt->req->getThreadNum()*/]++;
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BlkType *blk = tags->findBlock(pkt);
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Packet::Command cmd = coherence->getBusCmd(pkt->cmd,
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(blk)? blk->status : 0);
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@ -269,10 +271,12 @@ Cache<TagStore,Buffering,Coherence>::getPacket()
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template<class TagStore, class Buffering, class Coherence>
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void
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Cache<TagStore,Buffering,Coherence>::sendResult(PacketPtr &pkt, MSHR* mshr, bool success)
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Cache<TagStore,Buffering,Coherence>::sendResult(PacketPtr &pkt, MSHR* mshr,
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bool success)
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{
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if (success && !(pkt && (pkt->flags & NACKED_LINE))) {
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if (!mshr->pkt->needsResponse() && !(mshr->pkt->cmd == Packet::UpgradeReq)
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if (!mshr->pkt->needsResponse()
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&& !(mshr->pkt->cmd == Packet::UpgradeReq)
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&& (pkt && (pkt->flags & SATISFIED))) {
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//Writeback, clean up the non copy version of the packet
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delete pkt;
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@ -286,8 +290,10 @@ Cache<TagStore,Buffering,Coherence>::sendResult(PacketPtr &pkt, MSHR* mshr, bool
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CacheBlk::State old_state = (blk) ? blk->status : 0;
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CacheBlk::State new_state = coherence->getNewState(pkt,old_state);
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if (old_state != new_state)
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DPRINTF(Cache, "Block for blk addr %x moving from state %i to %i\n",
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pkt->getAddr() & (((ULL(1))<<48)-1), old_state, new_state);
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DPRINTF(Cache, "Block for blk addr %x moving from "
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"state %i to %i\n",
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pkt->getAddr() & (((ULL(1))<<48)-1),
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old_state, new_state);
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//Set the state on the upgrade
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memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize);
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PacketList writebacks;
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@ -319,7 +325,8 @@ Cache<TagStore,Buffering,Coherence>::handleResponse(Packet * &pkt)
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((MSHR*)pkt->senderState)->pkt = pkt;
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if (pkt->result == Packet::Nacked) {
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//pkt->reinitFromRequest();
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warn("NACKs from devices not connected to the same bus not implemented\n");
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warn("NACKs from devices not connected to the same bus "
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"not implemented\n");
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return;
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}
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if (pkt->result == Packet::BadAddress) {
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@ -335,8 +342,10 @@ Cache<TagStore,Buffering,Coherence>::handleResponse(Packet * &pkt)
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PacketList writebacks;
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CacheBlk::State new_state = coherence->getNewState(pkt,old_state);
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if (old_state != new_state)
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DPRINTF(Cache, "Block for blk addr %x moving from state %i to %i\n",
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pkt->getAddr() & (((ULL(1))<<48)-1), old_state, new_state);
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DPRINTF(Cache, "Block for blk addr %x moving from "
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"state %i to %i\n",
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pkt->getAddr() & (((ULL(1))<<48)-1),
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old_state, new_state);
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blk = tags->handleFill(blk, (MSHR*)pkt->senderState,
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new_state, writebacks, pkt);
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while (!writebacks.empty()) {
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@ -378,30 +387,36 @@ Cache<TagStore,Buffering,Coherence>::snoop(Packet * &pkt)
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BlkType *blk = tags->findBlock(pkt);
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MSHR *mshr = missQueue->findMSHR(blk_addr);
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if (coherence->hasProtocol()) { //@todo Move this into handle bus req
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//If we find an mshr, and it is in service, we need to NACK or invalidate
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//If we find an mshr, and it is in service, we need to NACK or
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//invalidate
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if (mshr) {
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if (mshr->inService) {
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if ((mshr->pkt->isInvalidate() || !mshr->pkt->isCacheFill())
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&& (pkt->cmd != Packet::InvalidateReq && pkt->cmd != Packet::WriteInvalidateReq)) {
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//If the outstanding request was an invalidate (upgrade,readex,..)
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//Then we need to ACK the request until we get the data
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//Also NACK if the outstanding request is not a cachefill (writeback)
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&& (pkt->cmd != Packet::InvalidateReq
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&& pkt->cmd != Packet::WriteInvalidateReq)) {
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//If the outstanding request was an invalidate
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//(upgrade,readex,..) Then we need to ACK the request
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//until we get the data Also NACK if the outstanding
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//request is not a cachefill (writeback)
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assert(!(pkt->flags & SATISFIED));
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pkt->flags |= SATISFIED;
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pkt->flags |= NACKED_LINE;
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///@todo NACK's from other levels
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//warn("NACKs from devices not connected to the same bus not implemented\n");
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//warn("NACKs from devices not connected to the same bus "
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//"not implemented\n");
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//respondToSnoop(pkt, curTick + hitLatency);
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return;
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}
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else {
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//The supplier will be someone else, because we are waiting for
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//the data. This should cause this cache to be forced to go to
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//the shared state, not the exclusive even though the shared line
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//won't be asserted. But for now we will just invlidate ourselves
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//and allow the other cache to go into the exclusive state.
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//@todo Make it so a read to a pending read doesn't invalidate.
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//@todo Make it so that a read to a pending read can't be exclusive now.
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//The supplier will be someone else, because we are
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//waiting for the data. This should cause this cache to
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//be forced to go to the shared state, not the exclusive
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//even though the shared line won't be asserted. But for
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//now we will just invlidate ourselves and allow the other
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//cache to go into the exclusive state. @todo Make it so
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//a read to a pending read doesn't invalidate. @todo Make
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//it so that a read to a pending read can't be exclusive
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//now.
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//Set the address so find match works
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//panic("Don't have invalidates yet\n");
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@ -409,7 +424,8 @@ Cache<TagStore,Buffering,Coherence>::snoop(Packet * &pkt)
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//Append the invalidate on
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missQueue->addTarget(mshr,invalidatePkt);
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DPRINTF(Cache, "Appending Invalidate to blk_addr: %x\n", pkt->getAddr() & (((ULL(1))<<48)-1));
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DPRINTF(Cache, "Appending Invalidate to blk_addr: %x\n",
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pkt->getAddr() & (((ULL(1))<<48)-1));
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return;
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}
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}
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@ -417,7 +433,8 @@ Cache<TagStore,Buffering,Coherence>::snoop(Packet * &pkt)
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//We also need to check the writeback buffers and handle those
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std::vector<MSHR *> writebacks;
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if (missQueue->findWrites(blk_addr, writebacks)) {
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DPRINTF(Cache, "Snoop hit in writeback to blk_addr: %x\n", pkt->getAddr() & (((ULL(1))<<48)-1));
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DPRINTF(Cache, "Snoop hit in writeback to blk_addr: %x\n",
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pkt->getAddr() & (((ULL(1))<<48)-1));
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//Look through writebacks for any non-uncachable writes, use that
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for (int i=0; i<writebacks.size(); i++) {
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@ -445,7 +462,8 @@ Cache<TagStore,Buffering,Coherence>::snoop(Packet * &pkt)
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}
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if (pkt->isInvalidate()) {
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//This must be an upgrade or other cache will take ownership
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//This must be an upgrade or other cache will take
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//ownership
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missQueue->markInService(mshr->pkt, mshr);
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}
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return;
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@ -456,16 +474,17 @@ Cache<TagStore,Buffering,Coherence>::snoop(Packet * &pkt)
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CacheBlk::State new_state;
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bool satisfy = coherence->handleBusRequest(pkt,blk,mshr, new_state);
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if (satisfy) {
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DPRINTF(Cache, "Cache snooped a %s request for addr %x and now supplying data,"
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"new state is %i\n",
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DPRINTF(Cache, "Cache snooped a %s request for addr %x and "
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"now supplying data, new state is %i\n",
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pkt->cmdString(), blk_addr, new_state);
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tags->handleSnoop(blk, new_state, pkt);
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respondToSnoop(pkt, curTick + hitLatency);
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return;
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}
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if (blk) DPRINTF(Cache, "Cache snooped a %s request for addr %x, new state is %i\n",
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pkt->cmdString(), blk_addr, new_state);
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if (blk)
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DPRINTF(Cache, "Cache snooped a %s request for addr %x, "
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"new state is %i\n", pkt->cmdString(), blk_addr, new_state);
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tags->handleSnoop(blk, new_state);
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}
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@ -478,12 +497,13 @@ Cache<TagStore,Buffering,Coherence>::snoopResponse(Packet * &pkt)
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//Need to mark it as not in service, and retry for bus
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assert(0); //Yeah, we saw a NACK come through
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//For now this should never get called, we return false when we see a NACK
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//instead, by doing this we allow the bus_blocked mechanism to handle the retry
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//For now it retrys in just 2 cycles, need to figure out how to change that
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//Eventually we will want to also have success come in as a parameter
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//Need to make sure that we handle the functionality that happens on successufl
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//return of the sendAddr function
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//For now this should never get called, we return false when we see a
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//NACK instead, by doing this we allow the bus_blocked mechanism to
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//handle the retry For now it retrys in just 2 cycles, need to figure
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//out how to change that Eventually we will want to also have success
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//come in as a parameter Need to make sure that we handle the
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//functionality that happens on successufl return of the sendAddr
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//function
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}
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}
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@ -500,7 +520,8 @@ Cache<TagStore,Buffering,Coherence>::invalidateBlk(Addr addr)
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*/
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template<class TagStore, class Buffering, class Coherence>
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Tick
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Cache<TagStore,Buffering,Coherence>::probe(Packet * &pkt, bool update, CachePort* otherSidePort)
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Cache<TagStore,Buffering,Coherence>::probe(Packet * &pkt, bool update,
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CachePort* otherSidePort)
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{
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// MemDebug::cacheProbe(pkt);
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if (!pkt->req->isUncacheable()) {
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@ -649,13 +670,17 @@ Cache<TagStore,Buffering,Coherence>::probe(Packet * &pkt, bool update, CachePort
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*/ misses[pkt->cmdToIndex()][0/*pkt->req->getThreadNum()*/]++;
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CacheBlk::State old_state = (blk) ? blk->status : 0;
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CacheBlk::State new_state = coherence->getNewState(busPkt, old_state);
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DPRINTF(Cache, "Receive response:%s for blk addr %x in state %i\n",
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CacheBlk::State new_state =
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coherence->getNewState(busPkt, old_state);
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DPRINTF(Cache,
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"Receive response:%s for blk addr %x in state %i\n",
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busPkt->cmdString(),
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busPkt->getAddr() & (((ULL(1))<<48)-1), old_state);
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if (old_state != new_state)
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DPRINTF(Cache, "Block for blk addr %x moving from state %i to %i\n",
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busPkt->getAddr() & (((ULL(1))<<48)-1), old_state, new_state);
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DPRINTF(Cache, "Block for blk addr %x moving from "
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"state %i to %i\n",
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busPkt->getAddr() & (((ULL(1))<<48)-1),
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old_state, new_state);
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tags->handleFill(blk, busPkt,
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new_state,
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@ -705,14 +730,16 @@ Cache<TagStore,Buffering,Coherence>::snoopProbe(PacketPtr &pkt)
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CacheBlk::State new_state = 0;
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bool satisfy = coherence->handleBusRequest(pkt,blk,mshr, new_state);
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if (satisfy) {
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DPRINTF(Cache, "Cache snooped a %s request for addr %x and now supplying data,"
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"new state is %i\n",
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DPRINTF(Cache, "Cache snooped a %s request for addr %x and "
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"now supplying data, new state is %i\n",
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pkt->cmdString(), blk_addr, new_state);
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tags->handleSnoop(blk, new_state, pkt);
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return hitLatency;
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}
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if (blk) DPRINTF(Cache, "Cache snooped a %s request for addr %x, new state is %i\n",
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if (blk)
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DPRINTF(Cache, "Cache snooped a %s request for addr %x, "
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"new state is %i\n",
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pkt->cmdString(), blk_addr, new_state);
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tags->handleSnoop(blk, new_state);
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return 0;
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