From 0d50979888c1653e9ceb856c6bffa3f5062adeb9 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Mon, 15 Feb 2016 03:40:32 -0500 Subject: [PATCH] misc: Add missing overrides to appease clang Since the last round of fixes a few new issues have snuck in. We should consider switching the regression runs to clang. --- src/arch/sparc/system.hh | 2 +- src/arch/sparc/tlb.hh | 6 ++--- src/cpu/kvm/base.hh | 28 ++++++++++++------------ src/cpu/kvm/x86_cpu.hh | 18 +++++++-------- src/cpu/minor/lsq.hh | 8 +++---- src/dev/net/etherswitch.hh | 2 +- src/dev/x86/pc.hh | 2 +- src/mem/ruby/system/WeightedLRUPolicy.hh | 4 ++-- 8 files changed, 35 insertions(+), 35 deletions(-) diff --git a/src/arch/sparc/system.hh b/src/arch/sparc/system.hh index 68a192cb9..d4b61bd95 100644 --- a/src/arch/sparc/system.hh +++ b/src/arch/sparc/system.hh @@ -48,7 +48,7 @@ class SparcSystem : public System SparcSystem(Params *p); ~SparcSystem(); - virtual void initState(); + void initState() override; /** * Serialization stuff diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh index cd4634ab8..65b6aff72 100644 --- a/src/arch/sparc/tlb.hh +++ b/src/arch/sparc/tlb.hh @@ -115,7 +115,7 @@ class TLB : public BaseTLB bool update_used = true); /** Remove all entries from the TLB */ - void flushAll(); + void flushAll() override; protected: /** Insert a PTE into the TLB. */ @@ -153,10 +153,10 @@ class TLB : public BaseTLB typedef SparcTLBParams Params; TLB(const Params *p); - void takeOverFrom(BaseTLB *otlb) {} + void takeOverFrom(BaseTLB *otlb) override {} void - demapPage(Addr vaddr, uint64_t asn) + demapPage(Addr vaddr, uint64_t asn) override { panic("demapPage(Addr) is not implemented.\n"); } diff --git a/src/cpu/kvm/base.hh b/src/cpu/kvm/base.hh index d57ac3421..4aeed2286 100644 --- a/src/cpu/kvm/base.hh +++ b/src/cpu/kvm/base.hh @@ -80,9 +80,9 @@ class BaseKvmCPU : public BaseCPU BaseKvmCPU(BaseKvmCPUParams *params); virtual ~BaseKvmCPU(); - void init(); - void startup(); - void regStats(); + void init() override; + void startup() override; + void regStats() override; void serializeThread(CheckpointOut &cp, ThreadID tid) const override; void unserializeThread(CheckpointIn &cp, ThreadID tid) override; @@ -90,24 +90,24 @@ class BaseKvmCPU : public BaseCPU DrainState drain() override; void drainResume() override; - void switchOut(); - void takeOverFrom(BaseCPU *cpu); + void switchOut() override; + void takeOverFrom(BaseCPU *cpu) override; - void verifyMemoryMode() const; + void verifyMemoryMode() const override; - MasterPort &getDataPort() { return dataPort; } - MasterPort &getInstPort() { return instPort; } + MasterPort &getDataPort() override { return dataPort; } + MasterPort &getInstPort() override { return instPort; } void wakeup(ThreadID tid = 0) override; - void activateContext(ThreadID thread_num); - void suspendContext(ThreadID thread_num); + void activateContext(ThreadID thread_num) override; + void suspendContext(ThreadID thread_num) override; void deallocateContext(ThreadID thread_num); - void haltContext(ThreadID thread_num); + void haltContext(ThreadID thread_num) override; - ThreadContext *getContext(int tn); + ThreadContext *getContext(int tn) override; - Counter totalInsts() const; - Counter totalOps() const; + Counter totalInsts() const override; + Counter totalOps() const override; /** Dump the internal state to the terminal. */ virtual void dump() const; diff --git a/src/cpu/kvm/x86_cpu.hh b/src/cpu/kvm/x86_cpu.hh index 14f16d544..7a1966965 100644 --- a/src/cpu/kvm/x86_cpu.hh +++ b/src/cpu/kvm/x86_cpu.hh @@ -44,7 +44,7 @@ class X86KvmCPU : public BaseKvmCPU X86KvmCPU(X86KvmCPUParams *params); virtual ~X86KvmCPU(); - void startup(); + void startup() override; /** @{ */ void dump() const override; @@ -61,7 +61,7 @@ class X86KvmCPU : public BaseKvmCPU protected: typedef std::vector KvmMSRVector; - Tick kvmRun(Tick ticks); + Tick kvmRun(Tick ticks) override; /** * Run the virtual CPU until draining completes. @@ -78,12 +78,12 @@ class X86KvmCPU : public BaseKvmCPU * * @return Number of ticks executed */ - Tick kvmRunDrain(); + Tick kvmRunDrain() override; /** Wrapper that synchronizes state in kvm_run */ Tick kvmRunWrapper(Tick ticks); - uint64_t getHostCycles() const; + uint64_t getHostCycles() const override; /** * Methods to access CPUID information using the extended @@ -132,8 +132,8 @@ class X86KvmCPU : public BaseKvmCPU void setVCpuEvents(const struct kvm_vcpu_events &events); /** @} */ - void updateKvmState(); - void updateThreadContext(); + void updateKvmState() override; + void updateThreadContext() override; /** * Inject pending interrupts from gem5 into the virtual CPU. @@ -143,9 +143,9 @@ class X86KvmCPU : public BaseKvmCPU /** * Handle x86 legacy IO (in/out) */ - Tick handleKvmExitIO(); + Tick handleKvmExitIO() override; - Tick handleKvmExitIRQWindowOpen(); + Tick handleKvmExitIRQWindowOpen() override; /** * Check if there are pending events in the vCPU that prevents it @@ -158,7 +158,7 @@ class X86KvmCPU : public BaseKvmCPU * @return False if there are pending events in the guest, True * otherwise. */ - bool archIsDrained() const; + bool archIsDrained() const override; private: /** diff --git a/src/cpu/minor/lsq.hh b/src/cpu/minor/lsq.hh index 33d7c506b..09fb30d03 100644 --- a/src/cpu/minor/lsq.hh +++ b/src/cpu/minor/lsq.hh @@ -98,17 +98,17 @@ class LSQ : public Named { } protected: - bool recvTimingResp(PacketPtr pkt) + bool recvTimingResp(PacketPtr pkt) override { return lsq.recvTimingResp(pkt); } - void recvReqRetry() { lsq.recvReqRetry(); } + void recvReqRetry() override { lsq.recvReqRetry(); } bool isSnooping() const override { return true; } - void recvTimingSnoopReq(PacketPtr pkt) + void recvTimingSnoopReq(PacketPtr pkt) override { return lsq.recvTimingSnoopReq(pkt); } - void recvFunctionalSnoop(PacketPtr pkt) { } + void recvFunctionalSnoop(PacketPtr pkt) override { } }; DcachePort dcachePort; diff --git a/src/dev/net/etherswitch.hh b/src/dev/net/etherswitch.hh index 69a3f40fd..760371777 100644 --- a/src/dev/net/etherswitch.hh +++ b/src/dev/net/etherswitch.hh @@ -60,7 +60,7 @@ class EtherSwitch : public EtherObject return dynamic_cast(_params); } - EtherInt *getEthPort(const std::string &if_name, int idx); + EtherInt *getEthPort(const std::string &if_name, int idx) override; protected: /** diff --git a/src/dev/x86/pc.hh b/src/dev/x86/pc.hh index 6cc57cb5d..fc209a67d 100644 --- a/src/dev/x86/pc.hh +++ b/src/dev/x86/pc.hh @@ -57,7 +57,7 @@ class Pc : public Platform /** * Do platform initialization stuff */ - void init(); + void init() override; Pc(const Params *p); diff --git a/src/mem/ruby/system/WeightedLRUPolicy.hh b/src/mem/ruby/system/WeightedLRUPolicy.hh index 3150779b2..3cee9cb47 100644 --- a/src/mem/ruby/system/WeightedLRUPolicy.hh +++ b/src/mem/ruby/system/WeightedLRUPolicy.hh @@ -49,11 +49,11 @@ class WeightedLRUPolicy : public AbstractReplacementPolicy WeightedLRUPolicy(const Params* p); ~WeightedLRUPolicy(); - void touch(int64_t set, int64_t way, Tick time); + void touch(int64_t set, int64_t way, Tick time) override; void touch(int64_t set, int64_t way, Tick time, int occupancy); int64_t getVictim(int64_t set) const override; - bool useOccupancy() const { return true; } + bool useOccupancy() const override { return true; } CacheMemory * m_cache; int **m_last_occ_ptr;