More progress... run a few instructions now, but die on the second

memory access (I think because we're deallocating our one and only
CpuRequest object).

base/loader/aout_object.cc:
base/loader/ecoff_object.cc:
base/loader/elf_object.cc:
    Add flag to force allocation of new pages on data writes.
cpu/simple/cpu.cc:
    Several minor fixes.
    Switch to atomic mode for now.
mem/physical.hh:
    Don't copy the packet to the response event, just keep a reference
    to the original.
mem/translating_port.cc:
mem/translating_port.hh:
    Add parameter to writeBlobFunctional() to force allocation of
    unallocated pages on writes.

--HG--
extra : convert_revision : 05cb31c7b0047b492dcfa0d12ddee690ef762b44
This commit is contained in:
Steve Reinhardt 2006-03-02 01:01:03 -05:00
parent 22504f8b48
commit 0c2c7171a8
7 changed files with 37 additions and 22 deletions

View file

@ -91,9 +91,11 @@ AoutObject::loadSections(TranslatingPort *memPort, bool loadPhys)
// Since we don't really have an MMU and all memory is // Since we don't really have an MMU and all memory is
// zero-filled, there's no need to set up the BSS segment. // zero-filled, there's no need to set up the BSS segment.
if (text.size != 0) if (text.size != 0)
memPort->writeBlobFunctional(textAddr, fileData + N_TXTOFF(*execHdr), text.size); memPort->writeBlobFunctional(textAddr, fileData + N_TXTOFF(*execHdr),
text.size, true);
if (data.size != 0) if (data.size != 0)
memPort->writeBlobFunctional(dataAddr, fileData + N_DATOFF(*execHdr), data.size); memPort->writeBlobFunctional(dataAddr, fileData + N_DATOFF(*execHdr),
data.size, true);
return true; return true;
} }

View file

@ -94,8 +94,10 @@ EcoffObject::loadSections(TranslatingPort *memPort, bool loadPhys)
// Since we don't really have an MMU and all memory is // Since we don't really have an MMU and all memory is
// zero-filled, there's no need to set up the BSS segment. // zero-filled, there's no need to set up the BSS segment.
memPort->writeBlobFunctional(textAddr, fileData + ECOFF_TXTOFF(execHdr), text.size); memPort->writeBlobFunctional(textAddr, fileData + ECOFF_TXTOFF(execHdr),
memPort->writeBlobFunctional(dataAddr, fileData + ECOFF_DATOFF(execHdr), data.size); text.size, true);
memPort->writeBlobFunctional(dataAddr, fileData + ECOFF_DATOFF(execHdr),
data.size, true);
return true; return true;
} }

View file

@ -183,9 +183,9 @@ ElfObject::loadSections(TranslatingPort *memPort, bool loadPhys)
// Since we don't really have an MMU and all memory is // Since we don't really have an MMU and all memory is
// zero-filled, there's no need to set up the BSS segment. // zero-filled, there's no need to set up the BSS segment.
if (text.size != 0) if (text.size != 0)
memPort->writeBlobFunctional(textAddr, fileTextBits, text.size); memPort->writeBlobFunctional(textAddr, fileTextBits, text.size, true);
if (data.size != 0) if (data.size != 0)
memPort->writeBlobFunctional(dataAddr, fileDataBits, data.size); memPort->writeBlobFunctional(dataAddr, fileDataBits, data.size, true);
return true; return true;
} }

View file

@ -659,7 +659,7 @@ SimpleCPU::dbg_vtophys(Addr addr)
void void
SimpleCPU::sendIcacheRequest() SimpleCPU::sendIcacheRequest()
{ {
#if 1 #if 0
bool success = icachePort.sendTiming(*pkt); bool success = icachePort.sendTiming(*pkt);
unscheduleTickEvent(); unscheduleTickEvent();
@ -674,7 +674,7 @@ SimpleCPU::sendIcacheRequest()
_status = IcacheWaitResponse; _status = IcacheWaitResponse;
} }
#else #else
Tick latency = icachePort.sendAtomic(pkt); Tick latency = icachePort.sendAtomic(*pkt);
unscheduleTickEvent(); unscheduleTickEvent();
scheduleTickEvent(latency); scheduleTickEvent(latency);
@ -695,7 +695,7 @@ SimpleCPU::sendDcacheRequest()
{ {
unscheduleTickEvent(); unscheduleTickEvent();
#if 1 #if 0
bool success = dcachePort.sendTiming(*pkt); bool success = dcachePort.sendTiming(*pkt);
lastDcacheStall = curTick; lastDcacheStall = curTick;
@ -706,7 +706,7 @@ SimpleCPU::sendDcacheRequest()
_status = DcacheWaitResponse; _status = DcacheWaitResponse;
} }
#else #else
Tick latency = dcachePort.sendAtomic(pkt); Tick latency = dcachePort.sendAtomic(*pkt);
scheduleTickEvent(latency); scheduleTickEvent(latency);
@ -891,7 +891,7 @@ SimpleCPU::tick()
/* memReq->reset(xc->regs.pc & ~3, sizeof(uint32_t), /* memReq->reset(xc->regs.pc & ~3, sizeof(uint32_t),
IFETCH_FLAGS(xc->regs.pc)); IFETCH_FLAGS(xc->regs.pc));
*/ */
//NEED NEW TRANSLATION HERE
fault = xc->translateInstReq(req); fault = xc->translateInstReq(req);
if (fault == No_Fault) { if (fault == No_Fault) {
@ -900,8 +900,10 @@ SimpleCPU::tick()
pkt->addr = req->paddr; pkt->addr = req->paddr;
pkt->size = sizeof(MachInst); pkt->size = sizeof(MachInst);
pkt->req = req; pkt->req = req;
pkt->data = (uint8_t *)&inst;
sendIcacheRequest(); sendIcacheRequest();
return;
/* fault = xc->mem->read(memReq, inst); /* fault = xc->mem->read(memReq, inst);
if (icacheInterface && fault == No_Fault) { if (icacheInterface && fault == No_Fault) {

View file

@ -80,7 +80,7 @@ class PhysicalMemory : public Memory
struct MemResponseEvent : public Event struct MemResponseEvent : public Event
{ {
Packet pkt; Packet &pkt;
MemoryPort *memoryPort; MemoryPort *memoryPort;
MemResponseEvent(Packet &pkt, MemoryPort *memoryPort); MemResponseEvent(Packet &pkt, MemoryPort *memoryPort);

View file

@ -47,29 +47,37 @@ TranslatingPort::readBlobFunctional(Addr addr, uint8_t *p, int size)
for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) { for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
if (!pTable->translate(gen.addr(),paddr)) if (!pTable->translate(gen.addr(),paddr))
return Machine_Check_Fault; return Machine_Check_Fault;
port->readBlobFunctional(paddr, p + prevSize, gen.size()); port->readBlobFunctional(paddr, p + prevSize, gen.size());
prevSize += gen.size(); prevSize += gen.size();
} }
return No_Fault; return No_Fault;
} }
Fault Fault
TranslatingPort::writeBlobFunctional(Addr addr, uint8_t *p, int size) TranslatingPort::writeBlobFunctional(Addr addr, uint8_t *p, int size,
bool alloc)
{ {
Addr paddr; Addr paddr;
int prevSize = 0; int prevSize = 0;
for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) { for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
if (!pTable->translate(gen.addr(),paddr)) if (!pTable->translate(gen.addr(), paddr)) {
return Machine_Check_Fault; if (alloc) {
pTable->allocate(roundDown(gen.addr(), VMPageSize),
VMPageSize);
pTable->translate(gen.addr(), paddr);
} else {
return Machine_Check_Fault;
}
}
port->writeBlobFunctional(paddr, p + prevSize, gen.size()); port->writeBlobFunctional(paddr, p + prevSize, gen.size());
prevSize += gen.size(); prevSize += gen.size();
} }
return No_Fault; return No_Fault;

View file

@ -49,7 +49,8 @@ class TranslatingPort
public: public:
Fault readBlobFunctional(Addr addr, uint8_t *p, int size); Fault readBlobFunctional(Addr addr, uint8_t *p, int size);
Fault writeBlobFunctional(Addr addr, uint8_t *p, int size); Fault writeBlobFunctional(Addr addr, uint8_t *p, int size,
bool alloc = false);
// Fault memsetBlobFunctional(Addr addr, uint8_t val, int size); // Fault memsetBlobFunctional(Addr addr, uint8_t val, int size);
Fault writeStringFunctional(Addr addr, const char *str); Fault writeStringFunctional(Addr addr, const char *str);
Fault readStringFunctional(std::string &str, Addr addr); Fault readStringFunctional(std::string &str, Addr addr);