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ARM: Fix compilation on ARM after Gabe's change.

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This commit is contained in:
Ali Saidi 2012-06-05 01:23:08 -04:00
parent 008b17d816
commit 0b0c5621ee
3 changed files with 49 additions and 2 deletions
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1
src/arch/arm/SConscript
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@ -57,6 +57,7 @@ if env['TARGET_ISA'] == 'arm':
Source('insts/vfp.cc')
Source('interrupts.cc')
Source('isa.cc')
Source('isa_traits.cc')
Source('linux/linux.cc')
Source('linux/process.cc')
Source('linux/system.cc')

47
src/arch/arm/isa_traits.cc Normal file
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@ -0,0 +1,47 @@
/*
* Copyright (c) 2012 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Ali Saidi
*/
#include "arch/arm/generated/decoder.hh"
#include "arch/arm/isa_traits.hh"
namespace ArmISA
{
// no-op that is predicated true
const StaticInstPtr NoopStaticInst = new ArmISAInst::NopInst(0x01E320F000ULL);
}

3
src/arch/arm/isa_traits.hh
View file

@ -95,8 +95,7 @@ namespace ArmISA
const Addr PAddrImplMask = (ULL(1) << PABits) - 1;
// return a no-op instruction... used for instruction fetch faults
const ExtMachInst NoopMachInst = 0x01E320F000ULL;
const extern StaticInstPtr NoopStaticInst;
const int LogVMPageSize = 12; // 4K bytes
const int VMPageSize = (1 << LogVMPageSize);