configs: More fixes for the memory system updates
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parent
ea8b347dc5
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0a26883296
2 changed files with 6 additions and 2 deletions
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@ -193,6 +193,10 @@ if len(bm) == 2:
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drive_sys.cpu.physmem_port = drive_sys.physmem.port
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drive_sys.cpu.physmem_port = drive_sys.physmem.port
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if options.kernel is not None:
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if options.kernel is not None:
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drive_sys.kernel = binary(options.kernel)
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drive_sys.kernel = binary(options.kernel)
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drive_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns',
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ranges = [AddrRange(bm[1].mem())])
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drive_sys.iobridge.slave = drive_sys.iobus.port
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drive_sys.iobridge.master = drive_sys.membus.port
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drive_sys.init_param = options.init_param
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drive_sys.init_param = options.init_param
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root = makeDualRoot(True, test_sys, drive_sys, options.etherdump)
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root = makeDualRoot(True, test_sys, drive_sys, options.etherdump)
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@ -351,10 +351,11 @@ class VExpress_ELT(RealView):
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def attachOnChipIO(self, bus, bridge):
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def attachOnChipIO(self, bus, bridge):
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self.gic.pio = bus.port
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self.gic.pio = bus.port
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self.a9scu.pio = bus.port
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self.a9scu.pio = bus.port
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self.local_cpu_timer.pio = bus.port
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# Bridge ranges based on excluding what is part of on-chip I/O
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# Bridge ranges based on excluding what is part of on-chip I/O
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# (gic, a9scu)
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# (gic, a9scu)
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bridge.ranges = [AddrRange(self.pci_cfg_base, self.a9scu.pio_addr - 1),
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bridge.ranges = [AddrRange(self.pci_cfg_base, self.a9scu.pio_addr - 1),
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AddrRange(self.local_cpu_timer.pio_addr, Addr.max)]
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AddrRange(self.l2x0_fake.pio_addr, Addr.max)]
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# Attach I/O devices to specified bus object. Can't do this
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# Attach I/O devices to specified bus object. Can't do this
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# earlier, since the bus object itself is typically defined at the
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# earlier, since the bus object itself is typically defined at the
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@ -363,7 +364,6 @@ class VExpress_ELT(RealView):
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self.elba_uart.pio = bus.port
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self.elba_uart.pio = bus.port
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self.uart.pio = bus.port
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self.uart.pio = bus.port
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self.realview_io.pio = bus.port
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self.realview_io.pio = bus.port
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self.local_cpu_timer.pio = bus.port
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self.v2m_timer0.pio = bus.port
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self.v2m_timer0.pio = bus.port
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self.v2m_timer1.pio = bus.port
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self.v2m_timer1.pio = bus.port
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self.elba_timer0.pio = bus.port
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self.elba_timer0.pio = bus.port
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