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More subtle fixes to how interrupts are supposed to work in the device. Fix postedInterrupts statistics.

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This commit is contained in:
Ali Saidi 2008-08-13 16:30:30 -04:00
parent 91d968783e
commit 05954e1ba7
2 changed files with 6 additions and 5 deletions
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3
src/dev/i8254xGBe.cc
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@ -588,7 +588,6 @@ IGbE::postInterrupt(IntTypes t, bool now)
if (interEvent.scheduled()) {
interEvent.deschedule();
}
postedInterrupts++;
cpuPostInt();
} else {
Tick int_time = lastInterrupt + itr_interval;
@ -612,6 +611,8 @@ void
IGbE::cpuPostInt()
{
postedInterrupts++;
if (!(regs.icr() & regs.imr)) {
DPRINTF(Ethernet, "Interrupt Masked. Not Posting\n");
return;

8
src/dev/i8254xGBe.hh
View file

@ -87,7 +87,7 @@ class IGbE : public EtherDevice
void rdtrProcess() {
rxDescCache.writeback(0);
DPRINTF(EthernetIntr, "Posting RXT interrupt because RDTR timer expired\n");
postInterrupt(iGbReg::IT_RXT, true);
postInterrupt(iGbReg::IT_RXT);
}
//friend class EventWrapper<IGbE, &IGbE::rdtrProcess>;
@ -97,7 +97,7 @@ class IGbE : public EtherDevice
void radvProcess() {
rxDescCache.writeback(0);
DPRINTF(EthernetIntr, "Posting RXT interrupt because RADV timer expired\n");
postInterrupt(iGbReg::IT_RXT, true);
postInterrupt(iGbReg::IT_RXT);
}
//friend class EventWrapper<IGbE, &IGbE::radvProcess>;
@ -107,7 +107,7 @@ class IGbE : public EtherDevice
void tadvProcess() {
txDescCache.writeback(0);
DPRINTF(EthernetIntr, "Posting TXDW interrupt because TADV timer expired\n");
postInterrupt(iGbReg::IT_TXDW, true);
postInterrupt(iGbReg::IT_TXDW);
}
//friend class EventWrapper<IGbE, &IGbE::tadvProcess>;
@ -117,7 +117,7 @@ class IGbE : public EtherDevice
void tidvProcess() {
txDescCache.writeback(0);
DPRINTF(EthernetIntr, "Posting TXDW interrupt because TIDV timer expired\n");
postInterrupt(iGbReg::IT_TXDW, true);
postInterrupt(iGbReg::IT_TXDW);
}
//friend class EventWrapper<IGbE, &IGbE::tidvProcess>;
EventWrapper<IGbE, &IGbE::tidvProcess> tidvEvent;