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When turning asserts into if's don't forget to invert.

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src/mem/cache/base_cache.cc:
    When turning asserts into if's don't forget to invert.
    Must be too sleepy.

--HG--
extra : convert_revision : ea38d5a4b4ddde7b5266b3b2c83bbc256218af9a
This commit is contained in:
Ron Dreslinski 2006-10-11 00:19:31 -04:00
parent 23bbd14426
commit 04f71f1226
1 changed files with 2 additions and 2 deletions
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4
src/mem/cache/base_cache.cc vendored
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@ -135,7 +135,7 @@ BaseCache::CachePort::recvRetry()
else if (!isCpuSide) else if (!isCpuSide)
{ {
DPRINTF(CachePort, "%s attempting to send a retry for MSHR\n", name()); DPRINTF(CachePort, "%s attempting to send a retry for MSHR\n", name());
if (cache->doMasterRequest()) { if (!cache->doMasterRequest()) {
//This can happen if I am the owner of a block and see an upgrade //This can happen if I am the owner of a block and see an upgrade
//while the block was in my WB Buffers. I just remove the //while the block was in my WB Buffers. I just remove the
//wb and de-assert the masterRequest //wb and de-assert the masterRequest
@ -243,7 +243,7 @@ BaseCache::CacheEvent::process()
else if (!cachePort->isCpuSide) else if (!cachePort->isCpuSide)
{ //MSHR { //MSHR
DPRINTF(CachePort, "%s trying to send a MSHR request\n", cachePort->name()); DPRINTF(CachePort, "%s trying to send a MSHR request\n", cachePort->name());
if (cachePort->cache->doMasterRequest()) { if (!cachePort->cache->doMasterRequest()) {
//This can happen if I am the owner of a block and see an upgrade //This can happen if I am the owner of a block and see an upgrade
//while the block was in my WB Buffers. I just remove the //while the block was in my WB Buffers. I just remove the
//wb and de-assert the masterRequest //wb and de-assert the masterRequest