cpu: Remove branch predictor function predictInOrder
This function was used by the now-defunct InOrderCPU model. Since this model is no longer in gem5, this function was not called from anywhere in the code.
This commit is contained in:
Jason Lowe-Power
parent
2a56260d5d
commit
047caf24ba
2 changed files with 0 additions and 125 deletions
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@ -320,128 +320,6 @@ BPredUnit::predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
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return pred_taken;
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return pred_taken;
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}
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}
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bool
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BPredUnit::predictInOrder(const StaticInstPtr &inst, const InstSeqNum &seqNum,
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int asid, TheISA::PCState &instPC,
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TheISA::PCState &predPC, ThreadID tid)
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{
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// See if branch predictor predicts taken.
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// If so, get its target addr either from the BTB or the RAS.
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// Save off record of branch stuff so the RAS can be fixed
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// up once it's done.
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using TheISA::MachInst;
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bool pred_taken = false;
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TheISA::PCState target;
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++lookups;
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ppBranches->notify(1);
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DPRINTF(Branch, "[tid:%i] [sn:%i] %s ... PC %s doing branch "
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"prediction\n", tid, seqNum,
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inst->disassemble(instPC.instAddr()), instPC);
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void *bp_history = NULL;
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if (inst->isUncondCtrl()) {
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DPRINTF(Branch, "[tid:%i] Unconditional control.\n", tid);
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pred_taken = true;
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// Tell the BP there was an unconditional branch.
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uncondBranch(tid, instPC.instAddr(), bp_history);
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if (inst->isReturn() && RAS[tid].empty()) {
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DPRINTF(Branch, "[tid:%i] RAS is empty, predicting "
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"false.\n", tid);
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pred_taken = false;
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}
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} else {
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++condPredicted;
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pred_taken = lookup(tid, predPC.instAddr(), bp_history);
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}
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PredictorHistory predict_record(seqNum, predPC.instAddr(), pred_taken,
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bp_history, tid);
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// Now lookup in the BTB or RAS.
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if (pred_taken) {
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if (inst->isReturn()) {
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++usedRAS;
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// If it's a function return call, then look up the address
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// in the RAS.
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TheISA::PCState rasTop = RAS[tid].top();
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target = TheISA::buildRetPC(instPC, rasTop);
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// Record the top entry of the RAS, and its index.
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predict_record.usedRAS = true;
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predict_record.RASIndex = RAS[tid].topIdx();
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predict_record.RASTarget = rasTop;
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assert(predict_record.RASIndex < 16);
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RAS[tid].pop();
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DPRINTF(Branch, "[tid:%i]: Instruction %s is a return, "
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"RAS predicted target: %s, RAS index: %i.\n",
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tid, instPC, target,
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predict_record.RASIndex);
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} else {
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++BTBLookups;
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if (inst->isCall()) {
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RAS[tid].push(instPC);
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predict_record.pushedRAS = true;
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// Record that it was a call so that the top RAS entry can
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// be popped off if the speculation is incorrect.
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predict_record.wasCall = true;
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DPRINTF(Branch, "[tid:%i]: Instruction %s was a call"
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", adding %s to the RAS index: %i.\n",
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tid, instPC, predPC,
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RAS[tid].topIdx());
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}
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if (inst->isCall() &&
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inst->isUncondCtrl() &&
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inst->isDirectCtrl()) {
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target = inst->branchTarget(instPC);
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} else if (BTB.valid(predPC.instAddr(), asid)) {
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++BTBHits;
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// If it's not a return, use the BTB to get the target addr.
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target = BTB.lookup(predPC.instAddr(), asid);
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DPRINTF(Branch, "[tid:%i]: [asid:%i] Instruction %s "
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"predicted target is %s.\n",
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tid, asid, instPC, target);
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} else {
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DPRINTF(Branch, "[tid:%i]: BTB doesn't have a "
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"valid entry, predicting false.\n",tid);
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pred_taken = false;
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}
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}
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}
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if (pred_taken) {
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// Set the PC and the instruction's predicted target.
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predPC = target;
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}
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DPRINTF(Branch, "[tid:%i]: [sn:%i]: Setting Predicted PC to %s.\n",
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tid, seqNum, predPC);
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predHist[tid].push_front(predict_record);
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DPRINTF(Branch, "[tid:%i] [sn:%i] pushed onto front of predHist "
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"...predHist.size(): %i\n",
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tid, seqNum, predHist[tid].size());
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return pred_taken;
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}
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void
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void
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BPredUnit::update(const InstSeqNum &done_sn, ThreadID tid)
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BPredUnit::update(const InstSeqNum &done_sn, ThreadID tid)
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{
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{
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@ -93,9 +93,6 @@ class BPredUnit : public SimObject
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*/
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*/
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bool predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
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bool predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
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TheISA::PCState &pc, ThreadID tid);
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TheISA::PCState &pc, ThreadID tid);
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bool predictInOrder(const StaticInstPtr &inst, const InstSeqNum &seqNum,
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int asid, TheISA::PCState &instPC,
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TheISA::PCState &predPC, ThreadID tid);
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// @todo: Rename this function.
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// @todo: Rename this function.
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virtual void uncondBranch(ThreadID tid, Addr pc, void * &bp_history) = 0;
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virtual void uncondBranch(ThreadID tid, Addr pc, void * &bp_history) = 0;
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