sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity

X86: Make shifts/rotations that write to 32 bits of a register zero extend.

Browse source
This commit is contained in:
Gabe Black 2009-08-05 02:59:25 -07:00
parent 7f9a3af250
commit 029d360db2
1 changed files with 4 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
src/arch/x86/isa/microops/regop.isa
View file

@ -734,7 +734,7 @@ let {{
DestReg = merge(DestReg, top | bottom, dataSize); DestReg = merge(DestReg, top | bottom, dataSize);
} }
else else
DestReg = DestReg; DestReg = merge(DestReg, DestReg, dataSize);
''' '''
flag_code = ''' flag_code = '''
// If the shift amount is zero, no flags should be modified. // If the shift amount is zero, no flags should be modified.
@ -771,7 +771,7 @@ let {{
DestReg = merge(DestReg, top | bottom, dataSize); DestReg = merge(DestReg, top | bottom, dataSize);
} }
else else
DestReg = DestReg; DestReg = merge(DestReg, DestReg, dataSize);
''' '''
flag_code = ''' flag_code = '''
// If the shift amount is zero, no flags should be modified. // If the shift amount is zero, no flags should be modified.
@ -805,7 +805,7 @@ let {{
DestReg = merge(DestReg, top | bottom, dataSize); DestReg = merge(DestReg, top | bottom, dataSize);
} }
else else
DestReg = DestReg; DestReg = merge(DestReg, DestReg, dataSize);
''' '''
flag_code = ''' flag_code = '''
// If the shift amount is zero, no flags should be modified. // If the shift amount is zero, no flags should be modified.
@ -844,7 +844,7 @@ let {{
DestReg = merge(DestReg, top | bottom, dataSize); DestReg = merge(DestReg, top | bottom, dataSize);
} }
else else
DestReg = DestReg; DestReg = merge(DestReg, DestReg, dataSize);
''' '''
flag_code = ''' flag_code = '''
// If the shift amount is zero, no flags should be modified. // If the shift amount is zero, no flags should be modified.