Configs: Use connectAllPorts to connect ports for simple-timing-ruby.
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@ -82,8 +82,7 @@ assert(len(system.ruby._cpu_ruby_ports) == 1)
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# Tie the cpu cache ports to the ruby cpu ports and
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# physmem, respectively
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#
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cpu.icache_port = system.ruby._cpu_ruby_ports[0].port
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cpu.dcache_port = system.ruby._cpu_ruby_ports[0].port
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cpu.connectAllPorts(system.ruby._cpu_ruby_ports[0])
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# -----------------------
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# run simulation
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