Filled in with basic x86 information. Some things are missing, wrong, or non-sensical in x86.
--HG-- extra : convert_revision : bba78db3667e214c95bb127872d3fdf546619703
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@ -58,10 +58,61 @@
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#ifndef __ARCH_X86_ISATRAITS_HH__
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#ifndef __ARCH_X86_ISATRAITS_HH__
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#define __ARCH_X86_ISATRAITS_HH__
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#define __ARCH_X86_ISATRAITS_HH__
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#error X86 is not yet supported!
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namespace LittleEndianGuest {}
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namespace X86ISA
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namespace X86ISA
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{
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{
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//This makes sure the little endian version of certain functions
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//are used.
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using namespace LittleEndianGuest;
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// X86 does not have a delay slot
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#define ISA_HAS_DELAY_SLOT 0
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// X86 NOP (XCHG rAX, rAX)
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//XXX This needs to be set to an intermediate instruction struct
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//which encodes this instruction
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// These enumerate all the registers for dependence tracking.
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enum DependenceTags {
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//The number of microcode registers needs to be added to this
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FP_Base_DepTag = 16,
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Ctrl_Base_DepTag =
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FP_Base_DepTag +
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//mmx/x87 registers
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8 +
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//xmm registers
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16
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};
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// semantically meaningful register indices
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//There is no such register in X86
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const int ZeroReg = 0;
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const int StackPointerReg = 4; //RSP
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//X86 doesn't seem to have a link register
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const int ReturnAddressReg = 0;
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const int ReturnValueReg = 0; //RAX
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const int FramePointerReg = 5; //RBP
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const int ArgumentReg0 = 7; //RDI
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const int ArgumentReg1 = 6; //RSI
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const int ArgumentReg2 = 2; //RDX
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const int ArgumentReg3 = 1; //RCX
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const int ArgumentReg4 = 8; //R8W
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const int ArgumentReg5 = 9; //R9W
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// Some OS syscalls use a second register (rdx) to return a second
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// value
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const int SyscallPseudoReturnReg = 2; //RDX
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//XXX These numbers are bogus
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const int MaxInstSrcRegs = 10;
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const int MaxInstDestRegs = 10;
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//4k. This value is not constant on x86.
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const int LogVmPageSize = 12;
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const int VMPageSize = (1 << LogVmPageSize);
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const int BranchPredAddrShiftAmt = 0;
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};
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};
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#endif // __ARCH_X86_ISATRAITS_HH__
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#endif // __ARCH_X86_ISATRAITS_HH__
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