diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 9ce8f515d..ac2d7af8b 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -620,7 +620,9 @@ Cache<TagStore,Buffering,Coherence>::probe(Packet * &pkt, bool update, CachePort
                 lat = memSidePort->sendAtomic(busPkt);
 
                 //Be sure to flip the response to a request for coherence
-                busPkt->makeAtomicResponse();
+                if (busPkt->needsResponse()) {
+                    busPkt->makeAtomicResponse();
+                }
 
 /*		if (!(busPkt->flags & SATISFIED)) {
                     // blocked at a higher level, just return