200 lines
6.4 KiB
C++
200 lines
6.4 KiB
C++
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/*
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* Copyright (c) 2013 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Andreas Hansson
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*/
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#include <cassert>
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/**
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* When building the debug binary, we need to undo the command-line
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* definition of DEBUG not to clash with DRAMSim2 print macros that
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* are included for no obvious reason.
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*/
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#ifdef DEBUG
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#undef DEBUG
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#endif
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#include <fstream>
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#include "DRAMSim2/MultiChannelMemorySystem.h"
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#include "base/compiler.hh"
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#include "base/misc.hh"
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#include "mem/dramsim2_wrapper.hh"
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/**
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* DRAMSim2 requires SHOW_SIM_OUTPUT to be defined (declared extern in
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* the DRAMSim2 print macros), otherwise we get linking errors due to
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* undefined references
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*/
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int SHOW_SIM_OUTPUT = 0;
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DRAMSim2Wrapper::DRAMSim2Wrapper(const std::string& config_file,
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const std::string& system_file,
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const std::string& working_dir,
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const std::string& trace_file,
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unsigned int memory_size_mb,
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bool enable_debug) :
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dramsim(new DRAMSim::MultiChannelMemorySystem(config_file, system_file,
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working_dir, trace_file,
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memory_size_mb, NULL, NULL)),
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_clockPeriod(0.0), _queueSize(0), _burstSize(0)
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{
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// tell DRAMSim2 to ignore its internal notion of a CPU frequency
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dramsim->setCPUClockSpeed(0);
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// switch on debug output if requested
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if (enable_debug)
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SHOW_SIM_OUTPUT = 1;
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// there is no way of getting DRAMSim2 to tell us what frequency
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// it is assuming, so we have to extract it ourselves
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_clockPeriod = extractConfig<double>("tCK=",
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working_dir + '/' + config_file);
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if (!_clockPeriod)
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fatal("DRAMSim2 wrapper failed to get clock\n");
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// we also need to know what transaction queue size DRAMSim2 is
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// using so we can stall when responses are blocked
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_queueSize = extractConfig<unsigned int>("TRANS_QUEUE_DEPTH=",
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working_dir + '/' + system_file);
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if (!_queueSize)
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fatal("DRAMSim2 wrapper failed to get queue size\n");
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// finally, get the data bus bits and burst length so we can add a
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// sanity check for the burst size
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unsigned int dataBusBits =
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extractConfig<unsigned int>("JEDEC_DATA_BUS_BITS=",
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working_dir + '/' + system_file);
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unsigned int burstLength =
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extractConfig<unsigned int>("BL=", working_dir + '/' + config_file);
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if (!dataBusBits || !burstLength)
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fatal("DRAMSim22 wrapper failed to get burst size\n");
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_burstSize = dataBusBits * burstLength / 8;
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}
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DRAMSim2Wrapper::~DRAMSim2Wrapper()
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{
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delete dramsim;
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}
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template <typename T>
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T
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DRAMSim2Wrapper::extractConfig(const std::string& field_name,
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const std::string& file_name) const
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{
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std::ifstream file_stream(file_name.c_str(), ios::in);
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if (!file_stream.good())
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fatal("DRAMSim2 wrapper could not open %s for reading\n", file_name);
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bool found = false;
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T res;
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std::string line;
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while (!found && file_stream) {
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getline(file_stream, line);
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if (line.substr(0, field_name.size()) == field_name) {
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found = true;
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istringstream iss(line.substr(field_name.size()));
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iss >> res;
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}
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}
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file_stream.close();
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if (!found)
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fatal("DRAMSim2 wrapper could not find %s in %s\n", field_name,
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file_name);
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return res;
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}
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void
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DRAMSim2Wrapper::printStats()
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{
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dramsim->printStats(true);
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}
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void
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DRAMSim2Wrapper::setCallbacks(DRAMSim::TransactionCompleteCB* read_callback,
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DRAMSim::TransactionCompleteCB* write_callback)
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{
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// simply pass it on, for now we ignore the power callback
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dramsim->RegisterCallbacks(read_callback, write_callback, NULL);
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}
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bool
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DRAMSim2Wrapper::canAccept() const
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{
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return dramsim->willAcceptTransaction();
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}
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void
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DRAMSim2Wrapper::enqueue(bool is_write, uint64_t addr)
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{
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bool success M5_VAR_USED = dramsim->addTransaction(is_write, addr);
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assert(success);
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}
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double
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DRAMSim2Wrapper::clockPeriod() const
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{
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return _clockPeriod;
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}
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unsigned int
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DRAMSim2Wrapper::queueSize() const
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{
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return _queueSize;
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}
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unsigned int
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DRAMSim2Wrapper::burstSize() const
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{
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return _burstSize;
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}
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void
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DRAMSim2Wrapper::tick()
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{
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dramsim->update();
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}
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