2007-03-03 17:01:48 +01:00
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/*
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* Copyright (c) 2007 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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* Redistribution and use of this software in source and binary forms,
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* with or without modification, are permitted provided that the
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* following conditions are met:
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*
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* The software must be used only for Non-Commercial Use which means any
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* use which is NOT directed to receiving any direct monetary
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* compensation for, or commercial advantage from such use. Illustrative
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* examples of non-commercial use are academic research, personal study,
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* teaching, education and corporate research & development.
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* Illustrative examples of commercial use are distributing products for
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* commercial advantage and providing services using the software for
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* commercial advantage.
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*
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* If you wish to use this software or functionality therein that may be
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* covered by patents for commercial use, please contact:
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* Director of Intellectual Property Licensing
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* Office of Strategy and Technology
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* Hewlett-Packard Company
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* 1501 Page Mill Road
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* Palo Alto, California 94304
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*
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* Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer. Redistributions
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* in binary form must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution. Neither the name of
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* the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission. No right of
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* sublicense is granted herewith. Derivatives of the software and
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* output created using the software may be prepared, but only for
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* Non-Commercial Uses. Derivatives of the software may be shared with
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* others provided: (i) the others agree to abide by the list of
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* conditions herein which includes the Non-Commercial Use restrictions;
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* and (ii) such Derivatives of the software include the above copyright
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* notice to acknowledge the contribution from this software where
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* applicable, this list of conditions and the disclaimer below.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#ifndef __ARCH_X86_TLB_HH__
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#define __ARCH_X86_TLB_HH__
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2007-10-03 08:00:37 +02:00
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#include <list>
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2007-11-12 23:38:31 +01:00
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#include <vector>
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2007-11-12 23:38:24 +01:00
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#include <string>
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2007-09-25 02:39:56 +02:00
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2007-10-03 08:00:37 +02:00
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#include "arch/x86/pagetable.hh"
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#include "arch/x86/segmentregs.hh"
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#include "config/full_system.hh"
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2007-11-12 23:38:24 +01:00
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#include "mem/mem_object.hh"
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2007-09-25 02:39:56 +02:00
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#include "mem/request.hh"
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#include "params/X86DTB.hh"
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#include "params/X86ITB.hh"
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#include "sim/faults.hh"
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#include "sim/sim_object.hh"
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class ThreadContext;
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class Packet;
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namespace X86ISA
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{
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2007-10-03 07:08:09 +02:00
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static const unsigned StoreCheck = 1 << NUM_SEGMENTREGS;
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2007-11-12 23:38:24 +01:00
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class TLB;
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class TLB : public MemObject
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{
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protected:
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friend class FakeITLBFault;
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friend class FakeDTLBFault;
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System * sys;
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2007-11-12 23:38:31 +01:00
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bool allowNX;
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public:
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typedef X86TLBParams Params;
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TLB(const Params *p);
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void dumpAll();
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TlbEntry *lookup(Addr va, bool update_lru = true);
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2007-11-12 23:38:24 +01:00
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#if FULL_SYSTEM
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protected:
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class Walker
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{
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public:
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enum State {
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Ready,
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Waiting,
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LongPML4,
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LongPDP,
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LongPD,
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LongPTE,
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PAEPDP,
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PAEPD,
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PAEPTE,
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PSEPD,
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PD,
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PTE
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};
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2007-11-12 23:38:31 +01:00
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// Act on the current state and determine what to do next. read
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// should be the packet that just came back from a read and write
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// should be NULL. When the function returns, read is either NULL
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// if the machine is finished, or points to a packet to initiate
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// the next read. If any write is required to update an "accessed"
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// bit, write will point to a packet to do the write. Otherwise it
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// will be NULL.
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void doNext(PacketPtr &read, PacketPtr &write);
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// Kick off the state machine.
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void start(ThreadContext * _tc, Addr vaddr);
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protected:
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friend class TLB;
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2007-11-12 23:38:31 +01:00
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/*
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* State having to do with sending packets.
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*/
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PacketPtr read;
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std::vector<PacketPtr> writes;
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// How many memory operations are in flight.
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unsigned inflight;
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bool retrying;
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/*
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* Functions for dealing with packets.
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*/
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bool recvTiming(PacketPtr pkt);
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void recvRetry();
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void sendPackets();
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/*
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* Port for accessing memory
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*/
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class WalkerPort : public Port
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{
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public:
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WalkerPort(const std::string &_name, Walker * _walker) :
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Port(_name, _walker->tlb), walker(_walker),
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snoopRangeSent(false)
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{}
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protected:
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Walker * walker;
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bool snoopRangeSent;
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bool recvTiming(PacketPtr pkt);
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Tick recvAtomic(PacketPtr pkt);
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void recvFunctional(PacketPtr pkt);
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void recvStatusChange(Status status);
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void recvRetry();
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void getDeviceAddressRanges(AddrRangeList &resp,
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bool &snoop)
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{
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resp.clear();
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snoop = true;
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}
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};
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friend class WalkerPort;
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WalkerPort port;
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2007-11-12 23:38:31 +01:00
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// The TLB we're supposed to load.
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TLB * tlb;
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/*
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* State machine state.
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*/
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ThreadContext * tc;
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2007-11-12 23:38:24 +01:00
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State state;
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State nextState;
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int size;
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bool enableNX;
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TlbEntry entry;
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2007-11-12 23:38:24 +01:00
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public:
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Walker(const std::string &_name, TLB * _tlb) :
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read(NULL), inflight(0), retrying(false),
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port(_name + "-walker_port", this),
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tlb(_tlb),
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tc(NULL), state(Ready), nextState(Ready)
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{
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}
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};
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Walker walker;
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2007-11-12 23:38:31 +01:00
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2007-11-12 23:38:24 +01:00
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#endif
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Port *getPort(const std::string &if_name, int idx = -1);
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protected:
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int size;
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2007-09-25 02:39:56 +02:00
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2007-10-03 08:00:37 +02:00
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TlbEntry * tlb;
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2007-08-27 05:33:57 +02:00
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2007-10-03 08:00:37 +02:00
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typedef std::list<TlbEntry *> EntryList;
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EntryList freeList;
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EntryList entryList;
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void insert(Addr vpn, TlbEntry &entry);
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void invalidateAll();
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void invalidateNonGlobal();
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2007-10-03 08:00:37 +02:00
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void demapPage(Addr va);
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2007-10-08 03:18:39 +02:00
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template<class TlbFault>
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Fault translate(RequestPtr &req, ThreadContext *tc,
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bool write, bool execute);
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2007-10-03 08:00:37 +02:00
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public:
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// Checkpointing
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virtual void serialize(std::ostream &os);
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virtual void unserialize(Checkpoint *cp, const std::string §ion);
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};
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2007-10-03 08:00:37 +02:00
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class ITB : public TLB
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{
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public:
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typedef X86ITBParams Params;
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ITB(const Params *p) : TLB(p)
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{
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sys = p->system;
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allowNX = false;
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}
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Fault translate(RequestPtr &req, ThreadContext *tc);
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friend class DTB;
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2007-08-27 05:24:18 +02:00
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};
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2007-10-03 08:00:37 +02:00
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class DTB : public TLB
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{
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public:
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typedef X86DTBParams Params;
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DTB(const Params *p) : TLB(p)
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{
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sys = p->system;
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allowNX = true;
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2007-10-03 08:00:37 +02:00
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}
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Fault translate(RequestPtr &req, ThreadContext *tc, bool write);
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#if FULL_SYSTEM
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Tick doMmuRegRead(ThreadContext *tc, Packet *pkt);
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Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt);
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2007-09-25 02:39:56 +02:00
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#endif
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2007-10-03 08:00:37 +02:00
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// Checkpointing
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virtual void serialize(std::ostream &os);
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virtual void unserialize(Checkpoint *cp, const std::string §ion);
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};
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}
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2007-03-03 17:01:48 +01:00
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#endif // __ARCH_X86_TLB_HH__
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