88 lines
3.2 KiB
C++
88 lines
3.2 KiB
C++
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/*
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* Copyright (c) 2012-2014 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Andrew Bardsley
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*/
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#include "cpu/minor/stats.hh"
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namespace Minor
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{
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MinorStats::MinorStats()
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{ }
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void
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MinorStats::regStats(const std::string &name, BaseCPU &baseCpu)
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{
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numInsts
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.name(name + ".committedInsts")
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.desc("Number of instructions committed");
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numOps
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.name(name + ".committedOps")
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.desc("Number of ops (including micro ops) committed");
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numDiscardedOps
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.name(name + ".discardedOps")
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.desc("Number of ops (including micro ops) which were discarded "
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"before commit");
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numFetchSuspends
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.name(name + ".numFetchSuspends")
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.desc("Number of times Execute suspended instruction fetching");
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quiesceCycles
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.name(name + ".quiesceCycles")
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.desc("Total number of cycles that CPU has spent quiesced or waiting "
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"for an interrupt")
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.prereq(quiesceCycles);
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cpi
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.name(name + ".cpi")
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.desc("CPI: cycles per instruction")
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.precision(6);
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cpi = baseCpu.numCycles / numInsts;
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ipc
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.name(name + ".ipc")
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.desc("IPC: instructions per cycle")
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.precision(6);
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ipc = numInsts / baseCpu.numCycles;
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}
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};
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