gem5/util/streamline/o3_stat_config.ini

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# Author: Dam Sunwoo
#
# Sample stats config file (O3CPU) for m5stats2streamline.py
#
# Stats grouped together will show as grouped in Streamline.
# E.g.,
#
# commit_inst_count =
#     system.cpu#.commit.committedInsts
#     system.cpu#.commit.commitSquashedInsts
#
# will display the inst counts (committed/squashed) as a stacked line chart.
# Charts will still be configurable in Streamline.

[PER_CPU_STATS]
# '#' will be automatically replaced with the correct CPU id.

icache =
    system.il1_cache#.overall_hits::total
    system.il1_cache#.overall_misses::total

dcache =
    system.dl1_cache#.overall_hits::total
    system.dl1_cache#.overall_misses::total

commit_inst_count =
    system.cpu#.commit.committedInsts
    system.cpu#.commit.commitSquashedInsts

cycles =
    system.cpu#.numCycles
    system.cpu#.idleCycles

branch_mispredict =
    system.cpu#.commit.branchMispredicts
itb =
    system.cpu#.itb.hits
    system.cpu#.itb.misses

dtb =
    system.cpu#.dtb.hits
    system.cpu#.dtb.misses

commit_inst_breakdown =
    system.cpu#.commit.loads
    system.cpu#.commit.membars
    system.cpu#.commit.branches
    system.cpu#.commit.fp_insts
    system.cpu#.commit.int_insts

int_regfile =
    system.cpu#.int_regfile_reads
    system.cpu#.int_regfile_writes

misc_regfile =
    system.cpu#.misc_regfile_reads
    system.cpu#.misc_regfile_writes

rename_full =
    system.cpu#.rename.ROBFullEvents
    system.cpu#.rename.IQFullEvents
    system.cpu#.rename.LSQFullEvents

[PER_L2_STATS]
# '#' will be automatically replaced with the correct L2 id.

l2_cache =
    system.l2_cache#.overall_hits::total
    system.l2_cache#.overall_misses::total

[OTHER_STATS]
# Anything that doesn't belong to CPU or L2 caches

physmem =
    system.memsys.mem_ctrls.bytes_read::total
    system.memsys.mem_ctrls.bytes_written::total