2014-05-12 23:22:17 +02:00
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{
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"name": null,
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"sim_quantum": 0,
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"system": {
|
2014-10-11 23:18:51 +02:00
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"kernel": "/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9",
|
2014-05-12 23:22:17 +02:00
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"l2c": {
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2014-10-11 23:18:51 +02:00
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"is_top_level": false,
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"prefetcher": null,
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"clk_domain": "system.cpu_clk_domain",
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"write_buffers": 8,
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"response_latency": 20,
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"cxx_class": "BaseCache",
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"size": 4194304,
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2014-05-12 23:22:17 +02:00
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"tags": {
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"name": "tags",
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"eventq_index": 0,
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"hit_latency": 20,
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2014-10-11 23:18:51 +02:00
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"clk_domain": "system.cpu_clk_domain",
|
2014-05-12 23:22:17 +02:00
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"sequential_access": false,
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"assoc": 8,
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"cxx_class": "LRU",
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"path": "system.l2c.tags",
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"block_size": 64,
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"type": "LRU",
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"size": 4194304
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},
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2014-10-11 23:18:51 +02:00
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"system": "system",
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2014-05-12 23:22:17 +02:00
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"max_miss_count": 0,
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"eventq_index": 0,
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2014-10-11 23:18:51 +02:00
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"mem_side": {
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"peer": "system.membus.slave[2]",
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"role": "MASTER"
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},
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"mshrs": 20,
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"forward_snoops": true,
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"hit_latency": 20,
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"tgts_per_mshr": 12,
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"addr_ranges": [
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"0:18446744073709551615"
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],
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"assoc": 8,
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2014-05-12 23:22:17 +02:00
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"prefetch_on_access": false,
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"path": "system.l2c",
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2014-10-11 23:18:51 +02:00
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"name": "l2c",
|
2014-05-12 23:22:17 +02:00
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"type": "BaseCache",
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2014-10-11 23:18:51 +02:00
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"sequential_access": false,
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"cpu_side": {
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"peer": "system.toL2Bus.master[0]",
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"role": "SLAVE"
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},
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"two_queue": false
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2014-05-12 23:22:17 +02:00
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},
|
2014-09-01 23:55:52 +02:00
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"kernel_addr_check": true,
|
2014-10-11 23:18:51 +02:00
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"bridge": {
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"ranges": [
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"3221225472:4294901760",
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"9223372036854775808:11529215046068469759",
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"13835058055282163712:18446744073709551615"
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],
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2014-05-12 23:22:17 +02:00
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"slave": {
|
2014-10-11 23:18:51 +02:00
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"peer": "system.membus.master[0]",
|
2014-05-12 23:22:17 +02:00
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"role": "SLAVE"
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},
|
2014-10-11 23:18:51 +02:00
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"name": "bridge",
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"req_size": 16,
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"clk_domain": "system.clk_domain",
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"delay": 50000,
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2014-05-12 23:22:17 +02:00
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"eventq_index": 0,
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"master": {
|
2014-10-11 23:18:51 +02:00
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"peer": "system.iobus.slave[0]",
|
2014-05-12 23:22:17 +02:00
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|
|
"role": "MASTER"
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|
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|
},
|
2014-10-11 23:18:51 +02:00
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|
"cxx_class": "Bridge",
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"path": "system.bridge",
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"resp_size": 16,
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"type": "Bridge"
|
2014-05-12 23:22:17 +02:00
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|
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},
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|
|
"iobus": {
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"slave": {
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"peer": [
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"system.bridge.master",
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"system.pc.south_bridge.ide.dma",
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"system.pc.south_bridge.io_apic.int_master"
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],
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"role": "SLAVE"
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},
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"name": "iobus",
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"default": {
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"peer": "system.pc.pciconfig.pio",
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"role": "MASTER"
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},
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2014-10-11 23:18:51 +02:00
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"clk_domain": "system.clk_domain",
|
2014-05-12 23:22:17 +02:00
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"header_cycles": 1,
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"width": 8,
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"eventq_index": 0,
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"master": {
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"peer": [
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"system.apicbridge.slave",
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"system.pc.south_bridge.cmos.pio",
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"system.pc.south_bridge.dma1.pio",
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"system.pc.south_bridge.ide.pio",
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"system.pc.south_bridge.ide.config",
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"system.pc.south_bridge.keyboard.pio",
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"system.pc.south_bridge.pic1.pio",
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"system.pc.south_bridge.pic2.pio",
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"system.pc.south_bridge.pit.pio",
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"system.pc.south_bridge.speaker.pio",
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"system.pc.south_bridge.io_apic.pio",
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"system.pc.i_dont_exist.pio",
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"system.pc.behind_pci.pio",
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|
|
|
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"system.pc.com_1.pio",
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"system.pc.fake_com_2.pio",
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"system.pc.fake_com_3.pio",
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"system.pc.fake_com_4.pio",
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|
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"system.pc.fake_floppy.pio",
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|
"system.iocache.cpu_side"
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|
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|
],
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|
"role": "MASTER"
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},
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2014-10-11 23:18:51 +02:00
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|
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"cxx_class": "NoncoherentXBar",
|
2014-05-12 23:22:17 +02:00
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|
"path": "system.iobus",
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2014-10-11 23:18:51 +02:00
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|
"type": "NoncoherentXBar",
|
2014-09-01 23:55:52 +02:00
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|
"use_default_range": false
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2014-05-12 23:22:17 +02:00
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},
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"apicbridge": {
|
2014-10-11 23:18:51 +02:00
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"ranges": [
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"11529215046068469760:11529215046068473855"
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|
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|
],
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2014-05-12 23:22:17 +02:00
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|
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"slave": {
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"peer": "system.iobus.master[0]",
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|
"role": "SLAVE"
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|
},
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"name": "apicbridge",
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"req_size": 16,
|
2014-10-11 23:18:51 +02:00
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|
|
"clk_domain": "system.clk_domain",
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"delay": 50000,
|
2014-05-12 23:22:17 +02:00
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|
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"eventq_index": 0,
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"master": {
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|
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"peer": "system.membus.slave[0]",
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"role": "MASTER"
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|
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|
|
},
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|
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"cxx_class": "Bridge",
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|
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|
|
"path": "system.apicbridge",
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|
|
|
|
"resp_size": 16,
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|
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|
"type": "Bridge"
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|
|
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|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"symbolfile": "",
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|
|
|
|
"readfile": "/scratch/nilay/GEM5/gem5/tests/halt.sh",
|
2014-05-12 23:22:17 +02:00
|
|
|
"intel_mp_table": {
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|
"oem_table_addr": 0,
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"name": "intel_mp_table",
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"ext_entries": [
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{
|
2014-10-11 23:18:51 +02:00
|
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|
"parent_bus": 0,
|
2014-05-12 23:22:17 +02:00
|
|
|
"name": "ext_entries",
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|
|
|
|
"type": "X86IntelMPBusHierarchy",
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|
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|
"subtractive_decode": true,
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|
|
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|
"eventq_index": 0,
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|
|
"cxx_class": "X86ISA::IntelMP::BusHierarchy",
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|
|
|
|
"path": "system.intel_mp_table.ext_entries",
|
2014-10-11 23:18:51 +02:00
|
|
|
"bus_id": 1
|
2014-05-12 23:22:17 +02:00
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|
|
}
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|
|
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|
],
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2014-10-11 23:18:51 +02:00
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|
|
"oem_id": "",
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2014-05-12 23:22:17 +02:00
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"eventq_index": 0,
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2014-10-11 23:18:51 +02:00
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|
|
"spec_rev": 4,
|
2014-05-12 23:22:17 +02:00
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|
|
"base_entries": [
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|
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{
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"enable": true,
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"local_apic_version": 20,
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"name": "base_entries00",
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"family": 0,
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"local_apic_id": 0,
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"bootstrap": true,
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"feature_flags": 0,
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"eventq_index": 0,
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"stepping": 0,
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"cxx_class": "X86ISA::IntelMP::Processor",
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|
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|
|
"path": "system.intel_mp_table.base_entries00",
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|
"model": 0,
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"type": "X86IntelMPProcessor"
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|
},
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{
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|
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|
|
"enable": true,
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|
|
|
|
"name": "base_entries01",
|
|
|
|
|
"cxx_class": "X86ISA::IntelMP::IOAPIC",
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|
|
|
|
"version": 17,
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|
|
"eventq_index": 0,
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"address": 4273995776,
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"path": "system.intel_mp_table.base_entries01",
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"type": "X86IntelMPIOAPIC",
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"id": 1
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},
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|
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{
|
2014-10-11 23:18:51 +02:00
|
|
|
"bus_type": "PCI",
|
2014-05-12 23:22:17 +02:00
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|
|
"name": "base_entries02",
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|
|
|
|
"type": "X86IntelMPBus",
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|
|
|
|
"eventq_index": 0,
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|
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|
"cxx_class": "X86ISA::IntelMP::Bus",
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|
|
|
|
"path": "system.intel_mp_table.base_entries02",
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|
|
|
|
"bus_id": 0
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|
|
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|
},
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{
|
2014-10-11 23:18:51 +02:00
|
|
|
"bus_type": "ISA",
|
2014-05-12 23:22:17 +02:00
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|
|
"name": "base_entries03",
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|
|
|
|
"type": "X86IntelMPBus",
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|
"eventq_index": 0,
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|
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|
"cxx_class": "X86ISA::IntelMP::Bus",
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|
|
|
|
"path": "system.intel_mp_table.base_entries03",
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|
|
|
|
"bus_id": 1
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|
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},
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{
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|
|
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"polarity": "ConformPolarity",
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|
"dest_io_apic_id": 1,
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|
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"name": "base_entries04",
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|
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"interrupt_type": "INT",
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|
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"trigger": "ConformTrigger",
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"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
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|
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"source_bus_id": 0,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
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|
|
|
|
"dest_io_apic_intin": 16,
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|
|
|
|
"path": "system.intel_mp_table.base_entries04",
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|
|
|
|
"type": "X86IntelMPIOIntAssignment",
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|
|
|
|
"source_bus_irq": 16
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|
|
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},
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|
|
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{
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|
|
|
|
"polarity": "ConformPolarity",
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|
|
|
|
"dest_io_apic_id": 1,
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|
|
|
|
"name": "base_entries05",
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|
|
|
|
"interrupt_type": "ExtInt",
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|
|
|
|
"trigger": "ConformTrigger",
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|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
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|
|
|
|
"dest_io_apic_intin": 0,
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|
|
|
|
"path": "system.intel_mp_table.base_entries05",
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|
|
|
|
"type": "X86IntelMPIOIntAssignment",
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|
|
|
|
"source_bus_irq": 0
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|
|
|
|
},
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|
|
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|
{
|
|
|
|
|
"polarity": "ConformPolarity",
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|
|
|
|
"dest_io_apic_id": 1,
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|
|
|
|
"name": "base_entries06",
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|
|
|
|
"interrupt_type": "INT",
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|
|
|
|
"trigger": "ConformTrigger",
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|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 2,
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|
|
|
|
"path": "system.intel_mp_table.base_entries06",
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|
|
|
|
"type": "X86IntelMPIOIntAssignment",
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|
|
|
|
"source_bus_irq": 0
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|
|
|
|
},
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|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
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|
|
|
|
"dest_io_apic_id": 1,
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|
|
|
|
"name": "base_entries07",
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|
|
|
|
"interrupt_type": "ExtInt",
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|
|
|
|
"trigger": "ConformTrigger",
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|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries07",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 1
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|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
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|
|
|
|
"name": "base_entries08",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
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|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 1,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries08",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 1
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries09",
|
|
|
|
|
"interrupt_type": "ExtInt",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries09",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 3
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries10",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 3,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries10",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 3
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries11",
|
|
|
|
|
"interrupt_type": "ExtInt",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries11",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 4
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries12",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 4,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries12",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 4
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries13",
|
|
|
|
|
"interrupt_type": "ExtInt",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries13",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 5
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries14",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 5,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries14",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 5
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries15",
|
|
|
|
|
"interrupt_type": "ExtInt",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries15",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 6
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries16",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 6,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries16",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 6
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries17",
|
|
|
|
|
"interrupt_type": "ExtInt",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries17",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 7
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries18",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 7,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries18",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 7
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries19",
|
|
|
|
|
"interrupt_type": "ExtInt",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries19",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 8
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries20",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 8,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries20",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 8
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries21",
|
|
|
|
|
"interrupt_type": "ExtInt",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries21",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 9
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries22",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 9,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries22",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 9
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries23",
|
|
|
|
|
"interrupt_type": "ExtInt",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries23",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 10
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries24",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 10,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries24",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 10
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries25",
|
|
|
|
|
"interrupt_type": "ExtInt",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries25",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 11
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries26",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 11,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries26",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 11
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries27",
|
|
|
|
|
"interrupt_type": "ExtInt",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries27",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 12
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries28",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 12,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries28",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 12
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries29",
|
|
|
|
|
"interrupt_type": "ExtInt",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries29",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 13
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries30",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 13,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries30",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 13
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries31",
|
|
|
|
|
"interrupt_type": "ExtInt",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 0,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries31",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 14
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"polarity": "ConformPolarity",
|
|
|
|
|
"dest_io_apic_id": 1,
|
|
|
|
|
"name": "base_entries32",
|
|
|
|
|
"interrupt_type": "INT",
|
|
|
|
|
"trigger": "ConformTrigger",
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"source_bus_id": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::IOIntAssignment",
|
|
|
|
|
"dest_io_apic_intin": 14,
|
|
|
|
|
"path": "system.intel_mp_table.base_entries32",
|
|
|
|
|
"type": "X86IntelMPIOIntAssignment",
|
|
|
|
|
"source_bus_irq": 14
|
|
|
|
|
}
|
|
|
|
|
],
|
|
|
|
|
"cxx_class": "X86ISA::IntelMP::ConfigTable",
|
|
|
|
|
"path": "system.intel_mp_table",
|
|
|
|
|
"type": "X86IntelMPConfigTable",
|
|
|
|
|
"local_apic": 4276092928,
|
2014-10-11 23:18:51 +02:00
|
|
|
"oem_table_size": 0,
|
|
|
|
|
"product_id": ""
|
2014-05-12 23:22:17 +02:00
|
|
|
},
|
|
|
|
|
"cxx_class": "LinuxX86System",
|
|
|
|
|
"load_offset": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"iocache": {
|
|
|
|
|
"is_top_level": true,
|
|
|
|
|
"prefetcher": null,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"write_buffers": 8,
|
|
|
|
|
"response_latency": 50,
|
|
|
|
|
"cxx_class": "BaseCache",
|
|
|
|
|
"size": 1024,
|
|
|
|
|
"tags": {
|
|
|
|
|
"name": "tags",
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"hit_latency": 50,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"sequential_access": false,
|
|
|
|
|
"assoc": 8,
|
|
|
|
|
"cxx_class": "LRU",
|
|
|
|
|
"path": "system.iocache.tags",
|
|
|
|
|
"block_size": 64,
|
|
|
|
|
"type": "LRU",
|
|
|
|
|
"size": 1024
|
|
|
|
|
},
|
|
|
|
|
"system": "system",
|
|
|
|
|
"max_miss_count": 0,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"mem_side": {
|
|
|
|
|
"peer": "system.membus.slave[4]",
|
|
|
|
|
"role": "MASTER"
|
|
|
|
|
},
|
|
|
|
|
"mshrs": 20,
|
|
|
|
|
"forward_snoops": false,
|
|
|
|
|
"hit_latency": 50,
|
|
|
|
|
"tgts_per_mshr": 12,
|
|
|
|
|
"addr_ranges": [
|
|
|
|
|
"0:134217727"
|
2014-09-01 23:55:52 +02:00
|
|
|
],
|
2014-10-11 23:18:51 +02:00
|
|
|
"assoc": 8,
|
|
|
|
|
"prefetch_on_access": false,
|
|
|
|
|
"path": "system.iocache",
|
|
|
|
|
"name": "iocache",
|
|
|
|
|
"type": "BaseCache",
|
|
|
|
|
"sequential_access": false,
|
|
|
|
|
"cpu_side": {
|
|
|
|
|
"peer": "system.iobus.master[18]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"two_queue": false
|
|
|
|
|
},
|
|
|
|
|
"intel_mp_pointer": {
|
|
|
|
|
"imcr_present": true,
|
|
|
|
|
"name": "intel_mp_pointer",
|
|
|
|
|
"spec_rev": 4,
|
2014-09-01 23:55:52 +02:00
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"cxx_class": "X86ISA::IntelMP::FloatingPointer",
|
|
|
|
|
"path": "system.intel_mp_pointer",
|
|
|
|
|
"type": "X86IntelMPFloatingPointer",
|
|
|
|
|
"default_config": 0
|
|
|
|
|
},
|
|
|
|
|
"memories": [
|
|
|
|
|
"system.physmem"
|
|
|
|
|
],
|
|
|
|
|
"acpi_description_table_pointer": {
|
|
|
|
|
"name": "acpi_description_table_pointer",
|
|
|
|
|
"cxx_class": "X86ISA::ACPI::RSDP",
|
|
|
|
|
"xsdt": {
|
|
|
|
|
"oem_table_id": "",
|
|
|
|
|
"name": "xsdt",
|
|
|
|
|
"entries": [],
|
|
|
|
|
"creator_revision": 0,
|
|
|
|
|
"creator_id": "",
|
|
|
|
|
"oem_id": "",
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::ACPI::XSDT",
|
|
|
|
|
"path": "system.acpi_description_table_pointer.xsdt",
|
|
|
|
|
"oem_revision": 0,
|
|
|
|
|
"type": "X86ACPIXSDT"
|
|
|
|
|
},
|
|
|
|
|
"rsdt": null,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"oem_id": "",
|
|
|
|
|
"path": "system.acpi_description_table_pointer",
|
|
|
|
|
"type": "X86ACPIRSDP",
|
|
|
|
|
"revision": 2
|
2014-09-01 23:55:52 +02:00
|
|
|
},
|
2014-05-12 23:22:17 +02:00
|
|
|
"clk_domain": {
|
|
|
|
|
"name": "clk_domain",
|
2014-10-11 23:18:51 +02:00
|
|
|
"clock": [
|
|
|
|
|
1000
|
|
|
|
|
],
|
2014-09-01 23:55:52 +02:00
|
|
|
"init_perf_level": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"voltage_domain": "system.voltage_domain",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "SrcClockDomain",
|
|
|
|
|
"path": "system.clk_domain",
|
2014-09-01 23:55:52 +02:00
|
|
|
"type": "SrcClockDomain",
|
|
|
|
|
"domain_id": -1
|
2014-05-12 23:22:17 +02:00
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"mem_ranges": [
|
|
|
|
|
"0:134217727"
|
|
|
|
|
],
|
|
|
|
|
"membus": {
|
|
|
|
|
"default": {
|
|
|
|
|
"peer": "system.membus.badaddr_responder.pio",
|
|
|
|
|
"role": "MASTER"
|
|
|
|
|
},
|
|
|
|
|
"slave": {
|
|
|
|
|
"peer": [
|
|
|
|
|
"system.apicbridge.master",
|
|
|
|
|
"system.system_port",
|
|
|
|
|
"system.l2c.mem_side",
|
|
|
|
|
"system.cpu0.interrupts.int_master",
|
|
|
|
|
"system.iocache.mem_side"
|
|
|
|
|
],
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"name": "membus",
|
|
|
|
|
"badaddr_responder": {
|
|
|
|
|
"system": "system",
|
|
|
|
|
"ret_data8": 255,
|
|
|
|
|
"name": "badaddr_responder",
|
|
|
|
|
"warn_access": "",
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.membus.default",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"ret_bad_addr": true,
|
|
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"fake_mem": false,
|
|
|
|
|
"pio_size": 8,
|
|
|
|
|
"ret_data32": 4294967295,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"update_data": false,
|
|
|
|
|
"ret_data64": 18446744073709551615,
|
|
|
|
|
"cxx_class": "IsaFake",
|
|
|
|
|
"path": "system.membus.badaddr_responder",
|
|
|
|
|
"pio_addr": 0,
|
|
|
|
|
"type": "IsaFake",
|
|
|
|
|
"ret_data16": 65535
|
|
|
|
|
},
|
|
|
|
|
"snoop_filter": null,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"header_cycles": 1,
|
|
|
|
|
"system": "system",
|
|
|
|
|
"width": 8,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"master": {
|
|
|
|
|
"peer": [
|
|
|
|
|
"system.bridge.slave",
|
|
|
|
|
"system.cpu0.interrupts.pio",
|
|
|
|
|
"system.cpu0.interrupts.int_slave",
|
|
|
|
|
"system.physmem.port"
|
|
|
|
|
],
|
|
|
|
|
"role": "MASTER"
|
|
|
|
|
},
|
|
|
|
|
"cxx_class": "CoherentXBar",
|
|
|
|
|
"path": "system.membus",
|
|
|
|
|
"type": "CoherentXBar",
|
|
|
|
|
"use_default_range": false
|
|
|
|
|
},
|
2014-05-12 23:22:17 +02:00
|
|
|
"pc": {
|
|
|
|
|
"fake_com_4": {
|
2014-10-11 23:18:51 +02:00
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"ret_data8": 255,
|
|
|
|
|
"name": "fake_com_4",
|
2014-10-11 23:18:51 +02:00
|
|
|
"warn_access": "",
|
2014-05-12 23:22:17 +02:00
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[16]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"ret_bad_addr": false,
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
2014-05-12 23:22:17 +02:00
|
|
|
"fake_mem": false,
|
|
|
|
|
"pio_size": 8,
|
|
|
|
|
"ret_data32": 4294967295,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"update_data": false,
|
|
|
|
|
"ret_data64": 18446744073709551615,
|
|
|
|
|
"cxx_class": "IsaFake",
|
|
|
|
|
"path": "system.pc.fake_com_4",
|
|
|
|
|
"pio_addr": 9223372036854776552,
|
|
|
|
|
"type": "IsaFake",
|
|
|
|
|
"ret_data16": 65535
|
|
|
|
|
},
|
|
|
|
|
"pciconfig": {
|
|
|
|
|
"name": "pciconfig",
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.default",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"bus": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 30000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"system": "system",
|
|
|
|
|
"platform": "system.pc",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "PciConfigAll",
|
|
|
|
|
"path": "system.pc.pciconfig",
|
|
|
|
|
"pio_addr": 0,
|
|
|
|
|
"type": "PciConfigAll",
|
|
|
|
|
"size": 16777216
|
|
|
|
|
},
|
|
|
|
|
"fake_com_2": {
|
2014-10-11 23:18:51 +02:00
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"ret_data8": 255,
|
|
|
|
|
"name": "fake_com_2",
|
2014-10-11 23:18:51 +02:00
|
|
|
"warn_access": "",
|
2014-05-12 23:22:17 +02:00
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[14]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"ret_bad_addr": false,
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
2014-05-12 23:22:17 +02:00
|
|
|
"fake_mem": false,
|
|
|
|
|
"pio_size": 8,
|
|
|
|
|
"ret_data32": 4294967295,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"update_data": false,
|
|
|
|
|
"ret_data64": 18446744073709551615,
|
|
|
|
|
"cxx_class": "IsaFake",
|
|
|
|
|
"path": "system.pc.fake_com_2",
|
|
|
|
|
"pio_addr": 9223372036854776568,
|
|
|
|
|
"type": "IsaFake",
|
|
|
|
|
"ret_data16": 65535
|
|
|
|
|
},
|
|
|
|
|
"name": "pc",
|
|
|
|
|
"south_bridge": {
|
|
|
|
|
"int_lines": [
|
|
|
|
|
{
|
|
|
|
|
"name": "int_lines0",
|
2014-10-11 23:18:51 +02:00
|
|
|
"source": "system.pc.south_bridge.pic1.output",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"sink": {
|
|
|
|
|
"name": "sink",
|
|
|
|
|
"number": 0,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::IntSinkPin",
|
2014-10-11 23:18:51 +02:00
|
|
|
"device": "system.pc.south_bridge.io_apic",
|
2014-05-12 23:22:17 +02:00
|
|
|
"path": "system.pc.south_bridge.int_lines0.sink",
|
|
|
|
|
"type": "X86IntSinkPin"
|
|
|
|
|
},
|
|
|
|
|
"cxx_class": "X86ISA::IntLine",
|
|
|
|
|
"path": "system.pc.south_bridge.int_lines0",
|
|
|
|
|
"type": "X86IntLine"
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"name": "int_lines1",
|
2014-10-11 23:18:51 +02:00
|
|
|
"source": "system.pc.south_bridge.pic2.output",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"sink": {
|
|
|
|
|
"name": "sink",
|
|
|
|
|
"number": 2,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::IntSinkPin",
|
2014-10-11 23:18:51 +02:00
|
|
|
"device": "system.pc.south_bridge.pic1",
|
2014-05-12 23:22:17 +02:00
|
|
|
"path": "system.pc.south_bridge.int_lines1.sink",
|
|
|
|
|
"type": "X86IntSinkPin"
|
|
|
|
|
},
|
|
|
|
|
"cxx_class": "X86ISA::IntLine",
|
|
|
|
|
"path": "system.pc.south_bridge.int_lines1",
|
|
|
|
|
"type": "X86IntLine"
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"name": "int_lines2",
|
2014-10-11 23:18:51 +02:00
|
|
|
"source": "system.pc.south_bridge.cmos.int_pin",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"sink": {
|
|
|
|
|
"name": "sink",
|
|
|
|
|
"number": 0,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::IntSinkPin",
|
2014-10-11 23:18:51 +02:00
|
|
|
"device": "system.pc.south_bridge.pic2",
|
2014-05-12 23:22:17 +02:00
|
|
|
"path": "system.pc.south_bridge.int_lines2.sink",
|
|
|
|
|
"type": "X86IntSinkPin"
|
|
|
|
|
},
|
|
|
|
|
"cxx_class": "X86ISA::IntLine",
|
|
|
|
|
"path": "system.pc.south_bridge.int_lines2",
|
|
|
|
|
"type": "X86IntLine"
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"name": "int_lines3",
|
2014-10-11 23:18:51 +02:00
|
|
|
"source": "system.pc.south_bridge.pit.int_pin",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"sink": {
|
|
|
|
|
"name": "sink",
|
|
|
|
|
"number": 0,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::IntSinkPin",
|
2014-10-11 23:18:51 +02:00
|
|
|
"device": "system.pc.south_bridge.pic1",
|
2014-05-12 23:22:17 +02:00
|
|
|
"path": "system.pc.south_bridge.int_lines3.sink",
|
|
|
|
|
"type": "X86IntSinkPin"
|
|
|
|
|
},
|
|
|
|
|
"cxx_class": "X86ISA::IntLine",
|
|
|
|
|
"path": "system.pc.south_bridge.int_lines3",
|
|
|
|
|
"type": "X86IntLine"
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"name": "int_lines4",
|
2014-10-11 23:18:51 +02:00
|
|
|
"source": "system.pc.south_bridge.pit.int_pin",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"sink": {
|
|
|
|
|
"name": "sink",
|
|
|
|
|
"number": 2,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::IntSinkPin",
|
2014-10-11 23:18:51 +02:00
|
|
|
"device": "system.pc.south_bridge.io_apic",
|
2014-05-12 23:22:17 +02:00
|
|
|
"path": "system.pc.south_bridge.int_lines4.sink",
|
|
|
|
|
"type": "X86IntSinkPin"
|
|
|
|
|
},
|
|
|
|
|
"cxx_class": "X86ISA::IntLine",
|
|
|
|
|
"path": "system.pc.south_bridge.int_lines4",
|
|
|
|
|
"type": "X86IntLine"
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"name": "int_lines5",
|
2014-10-11 23:18:51 +02:00
|
|
|
"source": "system.pc.south_bridge.keyboard.keyboard_int_pin",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"sink": {
|
|
|
|
|
"name": "sink",
|
|
|
|
|
"number": 1,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::IntSinkPin",
|
2014-10-11 23:18:51 +02:00
|
|
|
"device": "system.pc.south_bridge.io_apic",
|
2014-05-12 23:22:17 +02:00
|
|
|
"path": "system.pc.south_bridge.int_lines5.sink",
|
|
|
|
|
"type": "X86IntSinkPin"
|
|
|
|
|
},
|
|
|
|
|
"cxx_class": "X86ISA::IntLine",
|
|
|
|
|
"path": "system.pc.south_bridge.int_lines5",
|
|
|
|
|
"type": "X86IntLine"
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"name": "int_lines6",
|
2014-10-11 23:18:51 +02:00
|
|
|
"source": "system.pc.south_bridge.keyboard.mouse_int_pin",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"sink": {
|
|
|
|
|
"name": "sink",
|
|
|
|
|
"number": 12,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::IntSinkPin",
|
2014-10-11 23:18:51 +02:00
|
|
|
"device": "system.pc.south_bridge.io_apic",
|
2014-05-12 23:22:17 +02:00
|
|
|
"path": "system.pc.south_bridge.int_lines6.sink",
|
|
|
|
|
"type": "X86IntSinkPin"
|
|
|
|
|
},
|
|
|
|
|
"cxx_class": "X86ISA::IntLine",
|
|
|
|
|
"path": "system.pc.south_bridge.int_lines6",
|
|
|
|
|
"type": "X86IntLine"
|
|
|
|
|
}
|
|
|
|
|
],
|
|
|
|
|
"name": "south_bridge",
|
|
|
|
|
"speaker": {
|
|
|
|
|
"name": "speaker",
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[9]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::Speaker",
|
|
|
|
|
"path": "system.pc.south_bridge.speaker",
|
|
|
|
|
"pio_addr": 9223372036854775905,
|
2014-10-11 23:18:51 +02:00
|
|
|
"type": "PcSpeaker",
|
|
|
|
|
"i8254": "system.pc.south_bridge.pit"
|
2014-05-12 23:22:17 +02:00
|
|
|
},
|
|
|
|
|
"keyboard": {
|
2014-10-11 23:18:51 +02:00
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"command_port": 9223372036854775908,
|
|
|
|
|
"name": "keyboard",
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[5]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"mouse_int_pin": {
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"path": "system.pc.south_bridge.keyboard.mouse_int_pin",
|
|
|
|
|
"type": "X86IntSourcePin",
|
|
|
|
|
"name": "mouse_int_pin",
|
|
|
|
|
"cxx_class": "X86ISA::IntSourcePin"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
2014-05-12 23:22:17 +02:00
|
|
|
"keyboard_int_pin": {
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"path": "system.pc.south_bridge.keyboard.keyboard_int_pin",
|
|
|
|
|
"type": "X86IntSourcePin",
|
|
|
|
|
"name": "keyboard_int_pin",
|
|
|
|
|
"cxx_class": "X86ISA::IntSourcePin"
|
|
|
|
|
},
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::I8042",
|
|
|
|
|
"path": "system.pc.south_bridge.keyboard",
|
|
|
|
|
"pio_addr": 0,
|
|
|
|
|
"data_port": 9223372036854775904,
|
|
|
|
|
"type": "I8042"
|
|
|
|
|
},
|
|
|
|
|
"pit": {
|
|
|
|
|
"name": "pit",
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[8]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
2014-05-12 23:22:17 +02:00
|
|
|
"int_pin": {
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"path": "system.pc.south_bridge.pit.int_pin",
|
|
|
|
|
"type": "X86IntSourcePin",
|
|
|
|
|
"name": "int_pin",
|
|
|
|
|
"cxx_class": "X86ISA::IntSourcePin"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::I8254",
|
|
|
|
|
"path": "system.pc.south_bridge.pit",
|
|
|
|
|
"pio_addr": 9223372036854775872,
|
|
|
|
|
"type": "I8254"
|
|
|
|
|
},
|
|
|
|
|
"io_apic": {
|
|
|
|
|
"int_master": {
|
|
|
|
|
"peer": "system.iobus.slave[2]",
|
|
|
|
|
"role": "MASTER"
|
|
|
|
|
},
|
|
|
|
|
"name": "io_apic",
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[10]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"external_int_pic": "system.pc.south_bridge.pic1",
|
|
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"apic_id": 1,
|
2014-10-11 23:18:51 +02:00
|
|
|
"int_latency": 1000,
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::I82094AA",
|
|
|
|
|
"path": "system.pc.south_bridge.io_apic",
|
|
|
|
|
"pio_addr": 4273995776,
|
|
|
|
|
"type": "I82094AA"
|
|
|
|
|
},
|
|
|
|
|
"pic1": {
|
2014-10-11 23:18:51 +02:00
|
|
|
"slave": "system.pc.south_bridge.pic2",
|
2014-05-12 23:22:17 +02:00
|
|
|
"name": "pic1",
|
|
|
|
|
"output": {
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"path": "system.pc.south_bridge.pic1.output",
|
|
|
|
|
"type": "X86IntSourcePin",
|
|
|
|
|
"name": "output",
|
|
|
|
|
"cxx_class": "X86ISA::IntSourcePin"
|
|
|
|
|
},
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[6]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"mode": "I8259Master",
|
|
|
|
|
"cxx_class": "X86ISA::I8259",
|
|
|
|
|
"path": "system.pc.south_bridge.pic1",
|
|
|
|
|
"pio_addr": 9223372036854775840,
|
|
|
|
|
"type": "I8259"
|
|
|
|
|
},
|
|
|
|
|
"pic2": {
|
2014-10-11 23:18:51 +02:00
|
|
|
"slave": null,
|
2014-05-12 23:22:17 +02:00
|
|
|
"name": "pic2",
|
|
|
|
|
"output": {
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"path": "system.pc.south_bridge.pic2.output",
|
|
|
|
|
"type": "X86IntSourcePin",
|
|
|
|
|
"name": "output",
|
|
|
|
|
"cxx_class": "X86ISA::IntSourcePin"
|
|
|
|
|
},
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[7]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"mode": "I8259Slave",
|
|
|
|
|
"cxx_class": "X86ISA::I8259",
|
|
|
|
|
"path": "system.pc.south_bridge.pic2",
|
|
|
|
|
"pio_addr": 9223372036854775968,
|
|
|
|
|
"type": "I8259"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"platform": "system.pc",
|
2014-05-12 23:22:17 +02:00
|
|
|
"dma1": {
|
|
|
|
|
"name": "dma1",
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[2]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::I8237",
|
|
|
|
|
"path": "system.pc.south_bridge.dma1",
|
|
|
|
|
"pio_addr": 9223372036854775808,
|
|
|
|
|
"type": "I8237"
|
|
|
|
|
},
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "SouthBridge",
|
|
|
|
|
"path": "system.pc.south_bridge",
|
|
|
|
|
"ide": {
|
|
|
|
|
"PMCAPNextCapability": 0,
|
|
|
|
|
"InterruptPin": 1,
|
|
|
|
|
"HeaderType": 0,
|
|
|
|
|
"VendorID": 32902,
|
|
|
|
|
"MSIXMsgCtrl": 0,
|
|
|
|
|
"MSIXCAPNextCapability": 0,
|
|
|
|
|
"PXCAPLinkCtrl": 0,
|
|
|
|
|
"Revision": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"LegacyIOBase": 9223372036854775808,
|
|
|
|
|
"pio_latency": 30000,
|
|
|
|
|
"platform": "system.pc",
|
2014-05-12 23:22:17 +02:00
|
|
|
"PXCAPLinkCap": 0,
|
|
|
|
|
"CapabilityPtr": 0,
|
|
|
|
|
"MSIXCAPBaseOffset": 0,
|
|
|
|
|
"PXCAPDevCapabilities": 0,
|
|
|
|
|
"MSIXCAPCapId": 0,
|
|
|
|
|
"BAR3Size": 3,
|
|
|
|
|
"PXCAPCapabilities": 0,
|
|
|
|
|
"SubsystemID": 0,
|
|
|
|
|
"PXCAPCapId": 0,
|
|
|
|
|
"BAR4": 1,
|
|
|
|
|
"BAR1": 1012,
|
|
|
|
|
"BAR0": 496,
|
|
|
|
|
"BAR3": 884,
|
|
|
|
|
"BAR2": 368,
|
|
|
|
|
"BAR5": 1,
|
|
|
|
|
"PXCAPDevStatus": 0,
|
|
|
|
|
"disks": [
|
|
|
|
|
{
|
|
|
|
|
"driveID": "master",
|
|
|
|
|
"name": "disks0",
|
|
|
|
|
"image": {
|
|
|
|
|
"read_only": false,
|
|
|
|
|
"name": "image",
|
2014-10-11 23:18:51 +02:00
|
|
|
"cxx_class": "CowDiskImage",
|
|
|
|
|
"eventq_index": 0,
|
2014-05-12 23:22:17 +02:00
|
|
|
"child": {
|
|
|
|
|
"read_only": true,
|
|
|
|
|
"name": "child",
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "RawDiskImage",
|
|
|
|
|
"path": "system.pc.south_bridge.ide.disks0.image.child",
|
2014-10-11 23:18:51 +02:00
|
|
|
"image_file": "/scratch/nilay/GEM5/system/disks/linux-x86.img",
|
2014-05-12 23:22:17 +02:00
|
|
|
"type": "RawDiskImage"
|
|
|
|
|
},
|
|
|
|
|
"path": "system.pc.south_bridge.ide.disks0.image",
|
2014-10-11 23:18:51 +02:00
|
|
|
"image_file": "",
|
|
|
|
|
"type": "CowDiskImage",
|
|
|
|
|
"table_size": 65536
|
2014-05-12 23:22:17 +02:00
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"delay": 1000000,
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "IdeDisk",
|
|
|
|
|
"path": "system.pc.south_bridge.ide.disks0",
|
|
|
|
|
"type": "IdeDisk"
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"driveID": "master",
|
|
|
|
|
"name": "disks1",
|
|
|
|
|
"image": {
|
|
|
|
|
"read_only": false,
|
|
|
|
|
"name": "image",
|
2014-10-11 23:18:51 +02:00
|
|
|
"cxx_class": "CowDiskImage",
|
|
|
|
|
"eventq_index": 0,
|
2014-05-12 23:22:17 +02:00
|
|
|
"child": {
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|
|
|
|
"read_only": true,
|
|
|
|
|
"name": "child",
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|
"eventq_index": 0,
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|
|
|
"cxx_class": "RawDiskImage",
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|
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|
|
"path": "system.pc.south_bridge.ide.disks1.image.child",
|
2014-10-11 23:18:51 +02:00
|
|
|
"image_file": "/scratch/nilay/GEM5/system/disks/linux-bigswap2.img",
|
2014-05-12 23:22:17 +02:00
|
|
|
"type": "RawDiskImage"
|
|
|
|
|
},
|
|
|
|
|
"path": "system.pc.south_bridge.ide.disks1.image",
|
2014-10-11 23:18:51 +02:00
|
|
|
"image_file": "",
|
|
|
|
|
"type": "CowDiskImage",
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|
|
"table_size": 65536
|
2014-05-12 23:22:17 +02:00
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"delay": 1000000,
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "IdeDisk",
|
|
|
|
|
"path": "system.pc.south_bridge.ide.disks1",
|
|
|
|
|
"type": "IdeDisk"
|
|
|
|
|
}
|
|
|
|
|
],
|
|
|
|
|
"BAR2Size": 8,
|
|
|
|
|
"MSICAPNextCapability": 0,
|
|
|
|
|
"ExpansionROM": 0,
|
|
|
|
|
"MSICAPMsgCtrl": 0,
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|
|
"BAR5Size": 0,
|
|
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|
|
"CardbusCIS": 0,
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|
"MSIXPbaOffset": 0,
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"MSICAPBaseOffset": 0,
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|
"MaximumLatency": 0,
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|
|
"BAR2LegacyIO": true,
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|
|
"LatencyTimer": 0,
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|
|
"BAR4LegacyIO": false,
|
|
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|
|
"PXCAPLinkStatus": 0,
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|
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|
|
"PXCAPDevCap2": 0,
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|
|
|
|
"PXCAPDevCtrl": 0,
|
|
|
|
|
"MSICAPMaskBits": 0,
|
|
|
|
|
"Command": 0,
|
|
|
|
|
"SubClassCode": 1,
|
|
|
|
|
"pci_func": 0,
|
|
|
|
|
"BAR5LegacyIO": false,
|
|
|
|
|
"MSICAPMsgData": 0,
|
|
|
|
|
"BIST": 0,
|
|
|
|
|
"PXCAPDevCtrl2": 0,
|
|
|
|
|
"pci_bus": 0,
|
|
|
|
|
"InterruptLine": 14,
|
|
|
|
|
"MSICAPMsgAddr": 0,
|
|
|
|
|
"BAR3LegacyIO": true,
|
|
|
|
|
"BAR4Size": 16,
|
|
|
|
|
"path": "system.pc.south_bridge.ide",
|
|
|
|
|
"MinimumGrant": 0,
|
|
|
|
|
"Status": 640,
|
|
|
|
|
"BAR0Size": 8,
|
2014-10-11 23:18:51 +02:00
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"name": "ide",
|
|
|
|
|
"PXCAPNextCapability": 0,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"type": "IdeController",
|
|
|
|
|
"ctrl_offset": 0,
|
|
|
|
|
"PXCAPBaseOffset": 0,
|
|
|
|
|
"DeviceID": 28945,
|
|
|
|
|
"io_shift": 0,
|
|
|
|
|
"CacheLineSize": 0,
|
|
|
|
|
"dma": {
|
|
|
|
|
"peer": "system.iobus.slave[1]",
|
|
|
|
|
"role": "MASTER"
|
|
|
|
|
},
|
|
|
|
|
"PMCAPCapId": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"config_latency": 20000,
|
2014-05-12 23:22:17 +02:00
|
|
|
"BAR1Size": 3,
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[3]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"pci_dev": 4,
|
|
|
|
|
"PMCAPCtrlStatus": 0,
|
|
|
|
|
"cxx_class": "IdeController",
|
2014-10-11 23:18:51 +02:00
|
|
|
"clk_domain": "system.clk_domain",
|
2014-05-12 23:22:17 +02:00
|
|
|
"SubsystemVendorID": 0,
|
|
|
|
|
"PMCAPBaseOffset": 0,
|
|
|
|
|
"config": {
|
|
|
|
|
"peer": "system.iobus.master[4]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"MSICAPPendingBits": 0,
|
|
|
|
|
"MSIXTableOffset": 0,
|
|
|
|
|
"MSICAPMsgUpperAddr": 0,
|
|
|
|
|
"MSICAPCapId": 0,
|
|
|
|
|
"BAR0LegacyIO": true,
|
|
|
|
|
"ProgIF": 128,
|
|
|
|
|
"BAR1LegacyIO": true,
|
|
|
|
|
"PMCAPCapabilities": 0,
|
|
|
|
|
"ClassCode": 1
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|
|
|
|
},
|
|
|
|
|
"type": "SouthBridge",
|
|
|
|
|
"cmos": {
|
|
|
|
|
"name": "cmos",
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[1]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"time": "Sun Jan 1 00:00:00 2012",
|
2014-05-12 23:22:17 +02:00
|
|
|
"int_pin": {
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"path": "system.pc.south_bridge.cmos.int_pin",
|
|
|
|
|
"type": "X86IntSourcePin",
|
|
|
|
|
"name": "int_pin",
|
|
|
|
|
"cxx_class": "X86ISA::IntSourcePin"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::Cmos",
|
|
|
|
|
"path": "system.pc.south_bridge.cmos",
|
|
|
|
|
"pio_addr": 9223372036854775920,
|
|
|
|
|
"type": "Cmos"
|
|
|
|
|
}
|
|
|
|
|
},
|
|
|
|
|
"fake_floppy": {
|
2014-10-11 23:18:51 +02:00
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"ret_data8": 255,
|
|
|
|
|
"name": "fake_floppy",
|
2014-10-11 23:18:51 +02:00
|
|
|
"warn_access": "",
|
2014-05-12 23:22:17 +02:00
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[17]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"ret_bad_addr": false,
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
2014-05-12 23:22:17 +02:00
|
|
|
"fake_mem": false,
|
|
|
|
|
"pio_size": 2,
|
|
|
|
|
"ret_data32": 4294967295,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"update_data": false,
|
|
|
|
|
"ret_data64": 18446744073709551615,
|
|
|
|
|
"cxx_class": "IsaFake",
|
|
|
|
|
"path": "system.pc.fake_floppy",
|
|
|
|
|
"pio_addr": 9223372036854776818,
|
|
|
|
|
"type": "IsaFake",
|
|
|
|
|
"ret_data16": 65535
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|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"system": "system",
|
|
|
|
|
"intrctrl": "system.intrctrl",
|
2014-05-12 23:22:17 +02:00
|
|
|
"com_1": {
|
|
|
|
|
"name": "com_1",
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[13]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
|
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"terminal": {
|
|
|
|
|
"name": "terminal",
|
|
|
|
|
"output": true,
|
|
|
|
|
"number": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"intr_control": "system.intrctrl",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "Terminal",
|
|
|
|
|
"path": "system.pc.com_1.terminal",
|
|
|
|
|
"type": "Terminal",
|
|
|
|
|
"port": 3456
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"platform": "system.pc",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "Uart8250",
|
|
|
|
|
"path": "system.pc.com_1",
|
|
|
|
|
"pio_addr": 9223372036854776824,
|
|
|
|
|
"type": "Uart8250"
|
|
|
|
|
},
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "Pc",
|
|
|
|
|
"path": "system.pc",
|
|
|
|
|
"behind_pci": {
|
2014-10-11 23:18:51 +02:00
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"ret_data8": 255,
|
|
|
|
|
"name": "behind_pci",
|
2014-10-11 23:18:51 +02:00
|
|
|
"warn_access": "",
|
2014-05-12 23:22:17 +02:00
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[12]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"ret_bad_addr": false,
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
2014-05-12 23:22:17 +02:00
|
|
|
"fake_mem": false,
|
|
|
|
|
"pio_size": 8,
|
|
|
|
|
"ret_data32": 4294967295,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"update_data": false,
|
|
|
|
|
"ret_data64": 18446744073709551615,
|
|
|
|
|
"cxx_class": "IsaFake",
|
|
|
|
|
"path": "system.pc.behind_pci",
|
|
|
|
|
"pio_addr": 9223372036854779128,
|
|
|
|
|
"type": "IsaFake",
|
|
|
|
|
"ret_data16": 65535
|
|
|
|
|
},
|
|
|
|
|
"type": "Pc",
|
|
|
|
|
"i_dont_exist": {
|
2014-10-11 23:18:51 +02:00
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"ret_data8": 255,
|
|
|
|
|
"name": "i_dont_exist",
|
2014-10-11 23:18:51 +02:00
|
|
|
"warn_access": "",
|
2014-05-12 23:22:17 +02:00
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[11]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"ret_bad_addr": false,
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
2014-05-12 23:22:17 +02:00
|
|
|
"fake_mem": false,
|
|
|
|
|
"pio_size": 1,
|
|
|
|
|
"ret_data32": 4294967295,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"update_data": false,
|
|
|
|
|
"ret_data64": 18446744073709551615,
|
|
|
|
|
"cxx_class": "IsaFake",
|
|
|
|
|
"path": "system.pc.i_dont_exist",
|
|
|
|
|
"pio_addr": 9223372036854775936,
|
|
|
|
|
"type": "IsaFake",
|
|
|
|
|
"ret_data16": 65535
|
|
|
|
|
},
|
|
|
|
|
"fake_com_3": {
|
2014-10-11 23:18:51 +02:00
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"ret_data8": 255,
|
|
|
|
|
"name": "fake_com_3",
|
2014-10-11 23:18:51 +02:00
|
|
|
"warn_access": "",
|
2014-05-12 23:22:17 +02:00
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.iobus.master[15]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"ret_bad_addr": false,
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.clk_domain",
|
2014-05-12 23:22:17 +02:00
|
|
|
"fake_mem": false,
|
|
|
|
|
"pio_size": 8,
|
|
|
|
|
"ret_data32": 4294967295,
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"update_data": false,
|
|
|
|
|
"ret_data64": 18446744073709551615,
|
|
|
|
|
"cxx_class": "IsaFake",
|
|
|
|
|
"path": "system.pc.fake_com_3",
|
|
|
|
|
"pio_addr": 9223372036854776808,
|
|
|
|
|
"type": "IsaFake",
|
|
|
|
|
"ret_data16": 65535
|
|
|
|
|
}
|
|
|
|
|
},
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"e820_table": {
|
|
|
|
|
"name": "e820_table",
|
|
|
|
|
"cxx_class": "X86ISA::E820Table",
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-09-01 23:55:52 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-09-01 23:55:52 +02:00
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2014-10-11 23:18:51 +02:00
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2014-09-01 23:55:52 +02:00
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2014-10-11 23:18:51 +02:00
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2014-09-01 23:55:52 +02:00
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2014-10-11 23:18:51 +02:00
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2014-09-01 23:55:52 +02:00
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"path": "system.toL2Bus",
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2014-10-11 23:18:51 +02:00
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2014-09-01 23:55:52 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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"fastmem": false,
|
2014-10-11 23:18:51 +02:00
|
|
|
"profile": 0,
|
2014-05-12 23:22:17 +02:00
|
|
|
"icache_port": {
|
|
|
|
|
"peer": "system.cpu0.icache.cpu_side",
|
|
|
|
|
"role": "MASTER"
|
|
|
|
|
},
|
|
|
|
|
"icache": {
|
2014-10-11 23:18:51 +02:00
|
|
|
"is_top_level": true,
|
|
|
|
|
"prefetcher": null,
|
|
|
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
|
|
|
"write_buffers": 8,
|
|
|
|
|
"response_latency": 2,
|
|
|
|
|
"cxx_class": "BaseCache",
|
|
|
|
|
"size": 32768,
|
2014-05-12 23:22:17 +02:00
|
|
|
"tags": {
|
|
|
|
|
"name": "tags",
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"hit_latency": 2,
|
2014-10-11 23:18:51 +02:00
|
|
|
"clk_domain": "system.cpu_clk_domain",
|
2014-05-12 23:22:17 +02:00
|
|
|
"sequential_access": false,
|
|
|
|
|
"assoc": 1,
|
|
|
|
|
"cxx_class": "LRU",
|
|
|
|
|
"path": "system.cpu0.icache.tags",
|
|
|
|
|
"block_size": 64,
|
|
|
|
|
"type": "LRU",
|
|
|
|
|
"size": 32768
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"max_miss_count": 0,
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"mem_side": {
|
|
|
|
|
"peer": "system.toL2Bus.slave[0]",
|
|
|
|
|
"role": "MASTER"
|
|
|
|
|
},
|
|
|
|
|
"mshrs": 4,
|
|
|
|
|
"forward_snoops": true,
|
|
|
|
|
"hit_latency": 2,
|
|
|
|
|
"tgts_per_mshr": 20,
|
|
|
|
|
"addr_ranges": [
|
|
|
|
|
"0:18446744073709551615"
|
|
|
|
|
],
|
|
|
|
|
"assoc": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"prefetch_on_access": false,
|
|
|
|
|
"path": "system.cpu0.icache",
|
2014-10-11 23:18:51 +02:00
|
|
|
"name": "icache",
|
2014-05-12 23:22:17 +02:00
|
|
|
"type": "BaseCache",
|
2014-10-11 23:18:51 +02:00
|
|
|
"sequential_access": false,
|
|
|
|
|
"cpu_side": {
|
|
|
|
|
"peer": "system.cpu0.icache_port",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"two_queue": false
|
2014-05-12 23:22:17 +02:00
|
|
|
},
|
|
|
|
|
"interrupts": {
|
|
|
|
|
"int_master": {
|
|
|
|
|
"peer": "system.membus.slave[3]",
|
|
|
|
|
"role": "MASTER"
|
|
|
|
|
},
|
|
|
|
|
"name": "interrupts",
|
|
|
|
|
"pio": {
|
|
|
|
|
"peer": "system.membus.master[1]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"int_slave": {
|
|
|
|
|
"peer": "system.membus.master[2]",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"pio_latency": 100000,
|
|
|
|
|
"clk_domain": "system.cpu0.apic_clk_domain",
|
|
|
|
|
"system": "system",
|
|
|
|
|
"int_latency": 1000,
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::Interrupts",
|
|
|
|
|
"path": "system.cpu0.interrupts",
|
|
|
|
|
"pio_addr": 2305843009213693952,
|
|
|
|
|
"type": "X86LocalApic"
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"dcache_port": {
|
|
|
|
|
"peer": "system.cpu0.dcache.cpu_side",
|
|
|
|
|
"role": "MASTER"
|
|
|
|
|
},
|
2014-05-12 23:22:17 +02:00
|
|
|
"socket_id": 0,
|
|
|
|
|
"max_insts_all_threads": 0,
|
|
|
|
|
"path": "system.cpu0",
|
2014-10-11 23:18:51 +02:00
|
|
|
"max_loads_any_thread": 0,
|
2014-05-12 23:22:17 +02:00
|
|
|
"switched_out": false,
|
2014-10-11 23:18:51 +02:00
|
|
|
"workload": [],
|
2014-05-12 23:22:17 +02:00
|
|
|
"name": "cpu0",
|
|
|
|
|
"dtb": {
|
|
|
|
|
"name": "dtb",
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::TLB",
|
|
|
|
|
"walker": {
|
|
|
|
|
"name": "walker",
|
2014-10-11 23:18:51 +02:00
|
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::Walker",
|
|
|
|
|
"path": "system.cpu0.dtb.walker",
|
|
|
|
|
"type": "X86PagetableWalker",
|
|
|
|
|
"port": {
|
|
|
|
|
"peer": "system.toL2Bus.slave[3]",
|
|
|
|
|
"role": "MASTER"
|
|
|
|
|
},
|
|
|
|
|
"num_squash_per_cycle": 4
|
|
|
|
|
},
|
|
|
|
|
"path": "system.cpu0.dtb",
|
|
|
|
|
"type": "X86TLB",
|
|
|
|
|
"size": 64
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"simpoint_start_insts": [],
|
2014-05-12 23:22:17 +02:00
|
|
|
"max_insts_any_thread": 0,
|
|
|
|
|
"simulate_inst_stalls": false,
|
2014-10-11 23:18:51 +02:00
|
|
|
"progress_interval": 0,
|
|
|
|
|
"branchPred": null,
|
2014-05-12 23:22:17 +02:00
|
|
|
"dcache": {
|
2014-10-11 23:18:51 +02:00
|
|
|
"is_top_level": true,
|
|
|
|
|
"prefetcher": null,
|
|
|
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
|
|
|
"write_buffers": 8,
|
|
|
|
|
"response_latency": 2,
|
|
|
|
|
"cxx_class": "BaseCache",
|
|
|
|
|
"size": 32768,
|
2014-05-12 23:22:17 +02:00
|
|
|
"tags": {
|
|
|
|
|
"name": "tags",
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"hit_latency": 2,
|
2014-10-11 23:18:51 +02:00
|
|
|
"clk_domain": "system.cpu_clk_domain",
|
2014-05-12 23:22:17 +02:00
|
|
|
"sequential_access": false,
|
|
|
|
|
"assoc": 4,
|
|
|
|
|
"cxx_class": "LRU",
|
|
|
|
|
"path": "system.cpu0.dcache.tags",
|
|
|
|
|
"block_size": 64,
|
|
|
|
|
"type": "LRU",
|
|
|
|
|
"size": 32768
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|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"max_miss_count": 0,
|
|
|
|
|
"eventq_index": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"mem_side": {
|
|
|
|
|
"peer": "system.toL2Bus.slave[1]",
|
|
|
|
|
"role": "MASTER"
|
|
|
|
|
},
|
|
|
|
|
"mshrs": 4,
|
|
|
|
|
"forward_snoops": true,
|
|
|
|
|
"hit_latency": 2,
|
|
|
|
|
"tgts_per_mshr": 20,
|
|
|
|
|
"addr_ranges": [
|
|
|
|
|
"0:18446744073709551615"
|
|
|
|
|
],
|
|
|
|
|
"assoc": 4,
|
2014-05-12 23:22:17 +02:00
|
|
|
"prefetch_on_access": false,
|
|
|
|
|
"path": "system.cpu0.dcache",
|
2014-10-11 23:18:51 +02:00
|
|
|
"name": "dcache",
|
2014-05-12 23:22:17 +02:00
|
|
|
"type": "BaseCache",
|
2014-10-11 23:18:51 +02:00
|
|
|
"sequential_access": false,
|
|
|
|
|
"cpu_side": {
|
|
|
|
|
"peer": "system.cpu0.dcache_port",
|
|
|
|
|
"role": "SLAVE"
|
|
|
|
|
},
|
|
|
|
|
"two_queue": false
|
2014-05-12 23:22:17 +02:00
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"isa": [
|
|
|
|
|
{
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"path": "system.cpu0.isa",
|
|
|
|
|
"type": "X86ISA",
|
|
|
|
|
"name": "isa",
|
|
|
|
|
"cxx_class": "X86ISA::ISA"
|
|
|
|
|
}
|
|
|
|
|
],
|
2014-05-12 23:22:17 +02:00
|
|
|
"tracer": {
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"path": "system.cpu0.tracer",
|
|
|
|
|
"type": "ExeTracer",
|
|
|
|
|
"name": "tracer",
|
|
|
|
|
"cxx_class": "Trace::ExeTracer"
|
|
|
|
|
}
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"do_statistics_insts": true,
|
|
|
|
|
"numThreads": 1,
|
|
|
|
|
"itb": {
|
|
|
|
|
"name": "itb",
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::TLB",
|
|
|
|
|
"walker": {
|
|
|
|
|
"name": "walker",
|
2014-10-11 23:18:51 +02:00
|
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::Walker",
|
|
|
|
|
"path": "system.cpu1.itb.walker",
|
|
|
|
|
"type": "X86PagetableWalker",
|
|
|
|
|
"num_squash_per_cycle": 4
|
|
|
|
|
},
|
|
|
|
|
"path": "system.cpu1.itb",
|
|
|
|
|
"type": "X86TLB",
|
|
|
|
|
"size": 64
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"function_trace": false,
|
|
|
|
|
"do_checkpoint_insts": true,
|
|
|
|
|
"cxx_class": "TimingSimpleCPU",
|
|
|
|
|
"max_loads_all_threads": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"clk_domain": "system.cpu_clk_domain",
|
2014-05-12 23:22:17 +02:00
|
|
|
"function_trace_start": 0,
|
|
|
|
|
"cpu_id": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"checker": null,
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"do_quiesce": true,
|
|
|
|
|
"type": "TimingSimpleCPU",
|
2014-10-11 23:18:51 +02:00
|
|
|
"profile": 0,
|
|
|
|
|
"interrupts": null,
|
2014-05-12 23:22:17 +02:00
|
|
|
"socket_id": 0,
|
|
|
|
|
"max_insts_all_threads": 0,
|
|
|
|
|
"path": "system.cpu1",
|
2014-10-11 23:18:51 +02:00
|
|
|
"max_loads_any_thread": 0,
|
2014-05-12 23:22:17 +02:00
|
|
|
"switched_out": true,
|
2014-10-11 23:18:51 +02:00
|
|
|
"workload": [],
|
2014-05-12 23:22:17 +02:00
|
|
|
"name": "cpu1",
|
|
|
|
|
"dtb": {
|
|
|
|
|
"name": "dtb",
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::TLB",
|
|
|
|
|
"walker": {
|
|
|
|
|
"name": "walker",
|
2014-10-11 23:18:51 +02:00
|
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::Walker",
|
|
|
|
|
"path": "system.cpu1.dtb.walker",
|
|
|
|
|
"type": "X86PagetableWalker",
|
|
|
|
|
"num_squash_per_cycle": 4
|
|
|
|
|
},
|
|
|
|
|
"path": "system.cpu1.dtb",
|
|
|
|
|
"type": "X86TLB",
|
|
|
|
|
"size": 64
|
|
|
|
|
},
|
2014-10-11 23:18:51 +02:00
|
|
|
"simpoint_start_insts": [],
|
2014-05-12 23:22:17 +02:00
|
|
|
"max_insts_any_thread": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"progress_interval": 0,
|
|
|
|
|
"branchPred": null,
|
|
|
|
|
"isa": [
|
|
|
|
|
{
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"path": "system.cpu1.isa",
|
|
|
|
|
"type": "X86ISA",
|
|
|
|
|
"name": "isa",
|
|
|
|
|
"cxx_class": "X86ISA::ISA"
|
|
|
|
|
}
|
|
|
|
|
],
|
2014-05-12 23:22:17 +02:00
|
|
|
"tracer": {
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"path": "system.cpu1.tracer",
|
|
|
|
|
"type": "ExeTracer",
|
|
|
|
|
"name": "tracer",
|
|
|
|
|
"cxx_class": "Trace::ExeTracer"
|
|
|
|
|
}
|
|
|
|
|
},
|
|
|
|
|
{
|
|
|
|
|
"SQEntries": 32,
|
|
|
|
|
"smtLSQThreshold": 100,
|
2014-10-11 23:18:51 +02:00
|
|
|
"fetchTrapLatency": 1,
|
2014-05-12 23:22:17 +02:00
|
|
|
"iewToRenameDelay": 1,
|
|
|
|
|
"itb": {
|
|
|
|
|
"name": "itb",
|
|
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::TLB",
|
|
|
|
|
"walker": {
|
|
|
|
|
"name": "walker",
|
2014-10-11 23:18:51 +02:00
|
|
|
"clk_domain": "system.cpu_clk_domain",
|
|
|
|
|
"system": "system",
|
2014-05-12 23:22:17 +02:00
|
|
|
"eventq_index": 0,
|
|
|
|
|
"cxx_class": "X86ISA::Walker",
|
|
|
|
|
"path": "system.cpu2.itb.walker",
|
|
|
|
|
"type": "X86PagetableWalker",
|
|
|
|
|
"num_squash_per_cycle": 4
|
|
|
|
|
},
|
|
|
|
|
"path": "system.cpu2.itb",
|
|
|
|
|
"type": "X86TLB",
|
|
|
|
|
"size": 64
|
|
|
|
|
},
|
|
|
|
|
"fetchWidth": 8,
|
|
|
|
|
"max_loads_all_threads": 0,
|
2014-10-11 23:18:51 +02:00
|
|
|
"cpu_id": 0,
|
2014-05-12 23:22:17 +02:00
|
|
|
"fetchToDecodeDelay": 1,
|
|
|
|
|
"renameToDecodeDelay": 1,
|
2014-10-11 23:18:51 +02:00
|
|
|
"do_quiesce": true,
|
|
|
|
|
"renameToROBDelay": 1,
|
|
|
|
|
"max_insts_all_threads": 0,
|
|
|
|
|
"decodeWidth": 8,
|
|
|
|
|
"commitToFetchDelay": 1,
|
|
|
|
|
"needsTSO": true,
|
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"name": "cpu2",
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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},
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2014-10-11 23:18:51 +02:00
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"path": "system.cpu2.isa",
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"cxx_class": "X86ISA::ISA"
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}
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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"path": "system.intrctrl",
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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2014-10-11 23:18:51 +02:00
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2014-05-12 23:22:17 +02:00
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"path": "root",
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"type": "Root",
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"full_system": true
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}
|
