2006-01-29 23:28:04 +01:00
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/*
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* Copyright (c) 2003 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @file
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* Definitions of page table.
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*/
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#include <string>
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#include <map>
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#include <fstream>
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2006-02-15 20:21:09 +01:00
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using namespace std;
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2006-01-29 23:28:04 +01:00
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#include "base/intmath.hh"
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#include "base/trace.hh"
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2006-02-15 20:21:09 +01:00
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#include "mem/physical.hh"
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2006-01-29 23:28:04 +01:00
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#include "mem/page_table.hh"
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#include "sim/builder.hh"
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#include "sim/sim_object.hh"
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2006-02-15 20:21:09 +01:00
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PageTable::PageTable(const std::string &name)
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: SimObject(name)
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2006-01-29 23:28:04 +01:00
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{
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}
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PageTable::~PageTable()
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{
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2006-02-15 20:21:09 +01:00
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//Iterate the page table freeing the memoruy
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//Addr addr;
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//std::map<Addr,Addr>::iterator iter;
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//iter = pTable.begin();
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//while(iter != pTable.end())
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//{
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//delete [] (uint8_t *)iter->second;
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// iter ++;
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// }
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2006-01-29 23:28:04 +01:00
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}
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Fault
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PageTable::page_check(Addr addr, int size) const
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{
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if (size < sizeof(uint64_t)) {
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2006-02-15 20:21:09 +01:00
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if (!isPowerOf2(size)) {
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2006-01-29 23:28:04 +01:00
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panic("Invalid request size!\n");
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return Machine_Check_Fault;
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}
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if ((size - 1) & addr)
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return Alignment_Fault;
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}
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else {
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if ((addr & (VMPageSize - 1)) + size > VMPageSize) {
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panic("Invalid request size!\n");
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return Machine_Check_Fault;
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}
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if ((sizeof(uint64_t) - 1) & addr)
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return Alignment_Fault;
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}
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return No_Fault;
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}
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2006-02-15 20:21:09 +01:00
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Fault
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PageTable::translate(CpuRequestPtr &req)
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{
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//Should I check here for accesses that are > VMPageSize?
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req->paddr = translate(req->vaddr, req->asid);
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return page_check(req->paddr, req->size);
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}
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2006-01-29 23:28:04 +01:00
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2006-02-15 20:21:09 +01:00
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Addr
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PageTable::translate(Addr vaddr, unsigned asid)
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2006-01-29 23:28:04 +01:00
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{
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2006-02-15 20:21:09 +01:00
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Addr hash_addr;
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std::map<Addr,Addr>::iterator iter;
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2006-01-29 23:28:04 +01:00
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2006-02-15 20:21:09 +01:00
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//DPRINTF(PageTable,"PageTable: Virtual Address %#x Translating for ASID %i\n",
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// vaddr,asid);
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2006-01-29 23:28:04 +01:00
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2006-02-15 20:21:09 +01:00
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//Create the hash_addr
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//Combine vaddr and asid
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hash_addr = vaddr & (~(VMPageSize - 1)) | asid;
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2006-01-29 23:28:04 +01:00
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2006-02-15 20:21:09 +01:00
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//DPRINTF(PageTable,"PageTable: Hash Address %#x\n",hash_addr);
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2006-01-29 23:28:04 +01:00
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2006-02-15 20:21:09 +01:00
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//Look into the page table
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iter=pTable.find(hash_addr);
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2006-01-29 23:28:04 +01:00
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2006-02-15 20:21:09 +01:00
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//bool page_fault = true;
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2006-01-29 23:28:04 +01:00
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2006-02-15 20:21:09 +01:00
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//Store the translated address if found, and return
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if (iter != pTable.end()) //Found??
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{
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Addr return_addr = iter->second + (vaddr & (VMPageSize - 1));
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2006-01-29 23:28:04 +01:00
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2006-02-15 20:21:09 +01:00
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return return_addr;
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2006-01-29 23:28:04 +01:00
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}
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2006-02-15 20:21:09 +01:00
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else//Alocate a new page, register translation
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{
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Addr return_addr;
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//DPRINTF(PageTable,"PageTable: Page Not Found. Allocating new page\n");
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2006-01-29 23:28:04 +01:00
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2006-02-15 20:21:09 +01:00
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Addr new_page = mem->new_page();
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pTable[hash_addr] = new_page;
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return_addr = new_page + (vaddr & (VMPageSize - 1));
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return return_addr;
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}
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2006-01-29 23:28:04 +01:00
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}
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2006-02-15 20:21:09 +01:00
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BEGIN_DECLARE_SIM_OBJECT_PARAMS(PageTable)
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2006-01-29 23:28:04 +01:00
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2006-02-15 20:21:09 +01:00
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SimObjectParam<PhysicalMemory *> physmem;
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END_DECLARE_SIM_OBJECT_PARAMS(PageTable)
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BEGIN_INIT_SIM_OBJECT_PARAMS(PageTable)
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INIT_PARAM_DFLT(physmem, "Pointer to functional memory", NULL)
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END_INIT_SIM_OBJECT_PARAMS(PageTable)
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CREATE_SIM_OBJECT(PageTable)
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2006-01-29 23:28:04 +01:00
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{
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2006-02-15 20:21:09 +01:00
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PageTable *pTable = new PageTable(getInstanceName());
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if (physmem)
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pTable->setPhysMem(physmem);
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return pTable;
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2006-01-29 23:28:04 +01:00
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}
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2006-02-15 20:21:09 +01:00
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REGISTER_SIM_OBJECT("PageTable", PageTable)
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