sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
gem5/AUTHORS

47 lines
642 B
Text
Raw Normal View History

Update the readme to point people to m5.eecs.umich.edu start a new release section in RELEASE_NOTES add AUTHORS file that still needs work README: Update the readme to point people to m5.eecs.umich.edu RELEASE_NOTES: start a new release section --HG-- extra : convert_revision : 4c51e4255aecb67b10f18337428e5af114759d2e
2006-06-29 22:52:47 +02:00
Steven K. Reinhardt
-----------------------
Nathan L. Binkert
-----------------------
Erik G. Hallnor
-----------------------
Steve E. Raasch
-----------------------
Lisa R. Hsu
-----------------------
AUTHORS: author file contribution AUTHORS: author file contribution --HG-- extra : convert_revision : f4a08695fb4bf37df6144529c5791c75c11a0515
2006-08-16 19:46:21 +02:00
DP83820 NIC device model
Update the readme to point people to m5.eecs.umich.edu start a new release section in RELEASE_NOTES add AUTHORS file that still needs work README: Update the readme to point people to m5.eecs.umich.edu RELEASE_NOTES: start a new release section --HG-- extra : convert_revision : 4c51e4255aecb67b10f18337428e5af114759d2e
2006-06-29 22:52:47 +02:00
Ali G. Saidi
-----------------------
Andrew L. Schultz
-----------------------
Kevin T. Lim
-----------------------
Ronald G. Dreslinski Jr
-----------------------
Gabriel Black
-----------------------
Added the SPARC ISA as a contribution. --HG-- extra : convert_revision : 74b061a14436425b2ac475bb498d71105bfa8e01
2006-08-16 19:46:22 +02:00
SPARC ISA
Update the readme to point people to m5.eecs.umich.edu start a new release section in RELEASE_NOTES add AUTHORS file that still needs work README: Update the readme to point people to m5.eecs.umich.edu RELEASE_NOTES: start a new release section --HG-- extra : convert_revision : 4c51e4255aecb67b10f18337428e5af114759d2e
2006-06-29 22:52:47 +02:00
Make O3CPU model independent of the ISA Use O3CPU when building instead of AlphaO3CPU. I could use some better python magic in the cpu_models.py file! AUTHORS: add middle initial SConstruct: change from AlphaO3CPU to O3CPU src/cpu/SConscript: edits to build O3CPU instead of AlphaO3CPU src/cpu/cpu_models.py: change substitution template to use proper CPU EXEC CONTEXT For O3CPU Model... Actually, some Python expertise could be used here. The 'env' variable is not passed to this file, so I had to parse through the ARGV to find the ISA... src/cpu/o3/base_dyn_inst.cc: src/cpu/o3/bpred_unit.cc: src/cpu/o3/commit.cc: src/cpu/o3/cpu.cc: src/cpu/o3/cpu.hh: src/cpu/o3/decode.cc: src/cpu/o3/fetch.cc: src/cpu/o3/iew.cc: src/cpu/o3/inst_queue.cc: src/cpu/o3/lsq.cc: src/cpu/o3/lsq_unit.cc: src/cpu/o3/mem_dep_unit.cc: src/cpu/o3/rename.cc: src/cpu/o3/rob.cc: use isa_specific.hh src/sim/process.cc: only initi NextNPC if not ALPHA src/cpu/o3/alpha/cpu.cc: alphao3cpu impl src/cpu/o3/alpha/cpu.hh: move AlphaTC to it's own file src/cpu/o3/alpha/cpu_impl.hh: Move AlphaTC to it's own file ... src/cpu/o3/alpha/dyn_inst.cc: src/cpu/o3/alpha/dyn_inst.hh: src/cpu/o3/alpha/dyn_inst_impl.hh: include paths src/cpu/o3/alpha/impl.hh: include paths, set default MaxThreads to 2 instead of 4 src/cpu/o3/alpha/params.hh: set Alpha Specific Params here src/python/m5/objects/O3CPU.py: add O3CPU class src/cpu/o3/SConscript: include isa-specific build files src/cpu/o3/alpha/thread_context.cc: NEW HOME of AlphaTC src/cpu/o3/alpha/thread_context.hh: new home of AlphaTC src/cpu/o3/isa_specific.hh: includes ISA specific files src/cpu/o3/params.hh: base o3 params src/cpu/o3/thread_context.hh: base o3 thread context src/cpu/o3/thread_context_impl.hh: base o3 thead context impl --HG-- rename : src/cpu/o3/alpha_cpu.cc => src/cpu/o3/alpha/cpu.cc rename : src/cpu/o3/alpha_cpu.hh => src/cpu/o3/alpha/cpu.hh rename : src/cpu/o3/alpha_cpu_builder.cc => src/cpu/o3/alpha/cpu_builder.cc rename : src/cpu/o3/alpha_cpu_impl.hh => src/cpu/o3/alpha/cpu_impl.hh rename : src/cpu/o3/alpha_dyn_inst.cc => src/cpu/o3/alpha/dyn_inst.cc rename : src/cpu/o3/alpha_dyn_inst.hh => src/cpu/o3/alpha/dyn_inst.hh rename : src/cpu/o3/alpha_dyn_inst_impl.hh => src/cpu/o3/alpha/dyn_inst_impl.hh rename : src/cpu/o3/alpha_impl.hh => src/cpu/o3/alpha/impl.hh rename : src/cpu/o3/alpha_params.hh => src/cpu/o3/alpha/params.hh rename : src/python/m5/objects/AlphaO3CPU.py => src/python/m5/objects/O3CPU.py extra : convert_revision : d377d6417452ac337bc502f28b2fde907d6b340e
2006-07-01 01:52:08 +02:00
Korey L. Sewell
Update the readme to point people to m5.eecs.umich.edu start a new release section in RELEASE_NOTES add AUTHORS file that still needs work README: Update the readme to point people to m5.eecs.umich.edu RELEASE_NOTES: start a new release section --HG-- extra : convert_revision : 4c51e4255aecb67b10f18337428e5af114759d2e
2006-06-29 22:52:47 +02:00
-----------------------
AUTHORS: add in contributions AUTHORS: add in contributions --HG-- extra : convert_revision : 93b5a74d3ab35cdba1d0c12b04e5cb27e5906b11
2006-08-16 20:57:53 +02:00
MIPS ISA / O3CPU SMT Support
Update the readme to point people to m5.eecs.umich.edu start a new release section in RELEASE_NOTES add AUTHORS file that still needs work README: Update the readme to point people to m5.eecs.umich.edu RELEASE_NOTES: start a new release section --HG-- extra : convert_revision : 4c51e4255aecb67b10f18337428e5af114759d2e
2006-06-29 22:52:47 +02:00
David Green
-----------------------
Benjamin S. Nash
-----------------------
Miguel J. Serrano
-----------------------
Reference in a new issue Copy permalink