2014-09-20 23:17:53 +02:00
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/*
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* Copyright (c) 2014 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Andreas Sandberg
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*/
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#include "dev/virtio/block.hh"
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2016-11-09 21:27:37 +01:00
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#include "debug/VIOBlock.hh"
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2014-09-20 23:17:53 +02:00
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#include "params/VirtIOBlock.hh"
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#include "sim/system.hh"
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VirtIOBlock::VirtIOBlock(Params *params)
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: VirtIODeviceBase(params, ID_BLOCK, sizeof(Config), 0),
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qRequests(params->system->physProxy, params->queueSize, *this),
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image(*params->image)
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{
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registerQueue(qRequests);
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config.capacity = image.size();
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}
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VirtIOBlock::~VirtIOBlock()
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{
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}
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void
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VirtIOBlock::readConfig(PacketPtr pkt, Addr cfgOffset)
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{
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Config cfg_out;
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cfg_out.capacity = htov_legacy(config.capacity);
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readConfigBlob(pkt, cfgOffset, (uint8_t *)&cfg_out);
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}
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VirtIOBlock::Status
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VirtIOBlock::read(const BlkRequest &req, VirtDescriptor *desc_chain,
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size_t off_data, size_t size)
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{
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uint8_t data[size];
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uint64_t sector(req.sector);
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DPRINTF(VIOBlock, "Read request starting @ sector %i (size: %i)\n",
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sector, size);
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if (size % SectorSize != 0)
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panic("Unexpected request/sector size relationship\n");
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for (Addr offset = 0; offset < size; offset += SectorSize) {
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if (image.read(data + offset, sector) != SectorSize) {
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warn("Failed to read sector %i\n", sector);
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return S_IOERR;
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}
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++sector;
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}
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desc_chain->chainWrite(off_data, data, size);
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return S_OK;
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}
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VirtIOBlock::Status
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VirtIOBlock::write(const BlkRequest &req, VirtDescriptor *desc_chain,
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size_t off_data, size_t size)
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{
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uint8_t data[size];
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uint64_t sector(req.sector);
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DPRINTF(VIOBlock, "Write request starting @ sector %i (size: %i)\n",
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sector, size);
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if (size % SectorSize != 0)
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panic("Unexpected request/sector size relationship\n");
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desc_chain->chainRead(off_data, data, size);
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for (Addr offset = 0; offset < size; offset += SectorSize) {
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if (image.write(data + offset, sector) != SectorSize) {
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warn("Failed to write sector %i\n", sector);
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return S_IOERR;
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}
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++sector;
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}
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return S_OK;
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}
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void
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VirtIOBlock::RequestQueue::onNotifyDescriptor(VirtDescriptor *desc)
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{
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DPRINTF(VIOBlock, "Got input data descriptor (len: %i)\n",
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desc->size());
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/*
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* Read the request structure and do endian conversion if
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* necessary.
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*/
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BlkRequest req;
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desc->chainRead(0, (uint8_t *)&req, sizeof(req));
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req.type = htov_legacy(req.type);
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req.sector = htov_legacy(req.sector);
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Status status;
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const size_t data_size(desc->chainSize()
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- sizeof(BlkRequest) - sizeof(Status));
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switch (req.type) {
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case T_IN:
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status = parent.read(req, desc, sizeof(BlkRequest), data_size);
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break;
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case T_OUT:
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status = parent.write(req, desc, sizeof(BlkRequest), data_size);
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break;
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case T_FLUSH:
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status = S_OK;
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break;
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default:
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warn("Unsupported IO request: %i\n", req.type);
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status = S_UNSUPP;
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break;
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}
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desc->chainWrite(sizeof(BlkRequest) + data_size,
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&status, sizeof(status));
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// Tell the guest that we are done with this descriptor.
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produceDescriptor(desc, sizeof(BlkRequest) + data_size + sizeof(Status));
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parent.kick();
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}
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VirtIOBlock *
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VirtIOBlockParams::create()
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{
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return new VirtIOBlock(this);
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}
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