2016-01-19 20:28:22 +01:00
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#
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# Copyright (c) 2015 Advanced Micro Devices, Inc.
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# All rights reserved.
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#
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# For use for simulation and test purposes only
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#
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# 1. Redistributions of source code must retain the above copyright notice,
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# this list of conditions and the following disclaimer.
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#
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# 2. Redistributions in binary form must reproduce the above copyright notice,
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# this list of conditions and the following disclaimer in the documentation
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# and/or other materials provided with the distribution.
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#
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# 3. Neither the name of the copyright holder nor the names of its contributors
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# may be used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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# Author: Sooraj Puthoor
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#
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import math
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import m5
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from m5.objects import *
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from m5.defines import buildEnv
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from Ruby import create_topology
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from Ruby import send_evicts
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2016-10-13 09:17:19 +02:00
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from topologies.Cluster import Cluster
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from topologies.Crossbar import Crossbar
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2016-01-19 20:28:22 +01:00
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class CntrlBase:
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_seqs = 0
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@classmethod
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def seqCount(cls):
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# Use SeqCount not class since we need global count
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CntrlBase._seqs += 1
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return CntrlBase._seqs - 1
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_cntrls = 0
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@classmethod
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def cntrlCount(cls):
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# Use CntlCount not class since we need global count
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CntrlBase._cntrls += 1
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return CntrlBase._cntrls - 1
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_version = 0
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@classmethod
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def versionCount(cls):
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cls._version += 1 # Use count for this particular type
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return cls._version - 1
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class L1Cache(RubyCache):
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resourceStalls = False
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dataArrayBanks = 2
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tagArrayBanks = 2
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dataAccessLatency = 1
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tagAccessLatency = 1
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def create(self, size, assoc, options):
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self.size = MemorySize(size)
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self.assoc = assoc
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self.replacement_policy = PseudoLRUReplacementPolicy()
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class L2Cache(RubyCache):
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resourceStalls = False
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assoc = 16
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dataArrayBanks = 16
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tagArrayBanks = 16
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def create(self, size, assoc, options):
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self.size = MemorySize(size)
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self.assoc = assoc
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self.replacement_policy = PseudoLRUReplacementPolicy()
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class CPCntrl(CorePair_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L1Icache = L1Cache()
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self.L1Icache.create(options.l1i_size, options.l1i_assoc, options)
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self.L1D0cache = L1Cache()
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self.L1D0cache.create(options.l1d_size, options.l1d_assoc, options)
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self.L1D1cache = L1Cache()
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self.L1D1cache.create(options.l1d_size, options.l1d_assoc, options)
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self.L2cache = L2Cache()
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self.L2cache.create(options.l2_size, options.l2_assoc, options)
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self.sequencer = RubySequencer()
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self.sequencer.version = self.seqCount()
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self.sequencer.icache = self.L1Icache
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self.sequencer.dcache = self.L1D0cache
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self.sequencer.ruby_system = ruby_system
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self.sequencer.coreid = 0
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self.sequencer.is_cpu_sequencer = True
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self.sequencer1 = RubySequencer()
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self.sequencer1.version = self.seqCount()
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self.sequencer1.icache = self.L1Icache
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self.sequencer1.dcache = self.L1D1cache
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self.sequencer1.ruby_system = ruby_system
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self.sequencer1.coreid = 1
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self.sequencer1.is_cpu_sequencer = True
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self.issue_latency = options.cpu_to_dir_latency
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self.send_evictions = send_evicts(options)
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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class TCPCache(RubyCache):
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size = "16kB"
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assoc = 16
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dataArrayBanks = 16
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tagArrayBanks = 16
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dataAccessLatency = 4
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tagAccessLatency = 1
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def create(self, options):
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self.size = MemorySize(options.tcp_size)
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self.dataArrayBanks = 16
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self.tagArrayBanks = 16
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self.dataAccessLatency = 4
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self.tagAccessLatency = 1
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self.resourceStalls = options.no_tcc_resource_stalls
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self.replacement_policy = PseudoLRUReplacementPolicy()
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class TCPCntrl(TCP_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L1cache = TCPCache()
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self.L1cache.create(options)
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self.issue_latency = 1
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self.coalescer = VIPERCoalescer()
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self.coalescer.version = self.seqCount()
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self.coalescer.icache = self.L1cache
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self.coalescer.dcache = self.L1cache
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self.coalescer.ruby_system = ruby_system
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self.coalescer.support_inst_reqs = False
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self.coalescer.is_cpu_sequencer = False
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self.sequencer = RubySequencer()
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self.sequencer.version = self.seqCount()
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self.sequencer.icache = self.L1cache
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self.sequencer.dcache = self.L1cache
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self.sequencer.ruby_system = ruby_system
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self.sequencer.is_cpu_sequencer = True
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self.use_seq_not_coal = False
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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class SQCCache(RubyCache):
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dataArrayBanks = 8
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tagArrayBanks = 8
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dataAccessLatency = 1
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tagAccessLatency = 1
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def create(self, options):
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self.size = MemorySize(options.sqc_size)
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self.assoc = options.sqc_assoc
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self.replacement_policy = PseudoLRUReplacementPolicy()
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class SQCCntrl(SQC_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L1cache = SQCCache()
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self.L1cache.create(options)
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self.L1cache.resourceStalls = False
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self.sequencer = RubySequencer()
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self.sequencer.version = self.seqCount()
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self.sequencer.icache = self.L1cache
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self.sequencer.dcache = self.L1cache
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self.sequencer.ruby_system = ruby_system
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self.sequencer.support_data_reqs = False
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self.sequencer.is_cpu_sequencer = False
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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class TCC(RubyCache):
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size = MemorySize("256kB")
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assoc = 16
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dataAccessLatency = 8
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tagAccessLatency = 2
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resourceStalls = True
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def create(self, options):
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self.assoc = options.tcc_assoc
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if hasattr(options, 'bw_scalor') and options.bw_scalor > 0:
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s = options.num_compute_units
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tcc_size = s * 128
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tcc_size = str(tcc_size)+'kB'
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self.size = MemorySize(tcc_size)
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self.dataArrayBanks = 64
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self.tagArrayBanks = 64
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else:
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self.size = MemorySize(options.tcc_size)
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self.dataArrayBanks = 256 / options.num_tccs #number of data banks
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self.tagArrayBanks = 256 / options.num_tccs #number of tag banks
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self.size.value = self.size.value / options.num_tccs
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if ((self.size.value / long(self.assoc)) < 128):
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self.size.value = long(128 * self.assoc)
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self.start_index_bit = math.log(options.cacheline_size, 2) + \
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math.log(options.num_tccs, 2)
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self.replacement_policy = PseudoLRUReplacementPolicy()
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class TCCCntrl(TCC_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L2cache = TCC()
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self.L2cache.create(options)
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self.ruby_system = ruby_system
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self.L2cache.resourceStalls = options.no_tcc_resource_stalls
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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class L3Cache(RubyCache):
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dataArrayBanks = 16
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tagArrayBanks = 16
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def create(self, options, ruby_system, system):
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self.size = MemorySize(options.l3_size)
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self.size.value /= options.num_dirs
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self.assoc = options.l3_assoc
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self.dataArrayBanks /= options.num_dirs
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self.tagArrayBanks /= options.num_dirs
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self.dataArrayBanks /= options.num_dirs
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self.tagArrayBanks /= options.num_dirs
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self.dataAccessLatency = options.l3_data_latency
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self.tagAccessLatency = options.l3_tag_latency
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self.resourceStalls = False
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self.replacement_policy = PseudoLRUReplacementPolicy()
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class ProbeFilter(RubyCache):
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size = "4MB"
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assoc = 16
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dataArrayBanks = 256
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tagArrayBanks = 256
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def create(self, options, ruby_system, system):
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self.block_size = "%dB" % (64 * options.blocks_per_region)
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self.size = options.region_dir_entries * \
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self.block_size * options.num_compute_units
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self.assoc = 8
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self.tagArrayBanks = 8
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self.tagAccessLatency = options.dir_tag_latency
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self.dataAccessLatency = 1
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self.resourceStalls = options.no_resource_stalls
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self.start_index_bit = 6 + int(math.log(options.blocks_per_region, 2))
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self.replacement_policy = PseudoLRUReplacementPolicy()
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class L3Cntrl(L3Cache_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L3cache = L3Cache()
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self.L3cache.create(options, ruby_system, system)
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self.l3_response_latency = \
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max(self.L3cache.dataAccessLatency, self.L3cache.tagAccessLatency)
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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def connectWireBuffers(self, req_to_dir, resp_to_dir, l3_unblock_to_dir,
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req_to_l3, probe_to_l3, resp_to_l3):
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self.reqToDir = req_to_dir
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self.respToDir = resp_to_dir
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self.l3UnblockToDir = l3_unblock_to_dir
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self.reqToL3 = req_to_l3
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self.probeToL3 = probe_to_l3
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self.respToL3 = resp_to_l3
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class DirMem(RubyDirectoryMemory, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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phys_mem_size = AddrRange(options.mem_size).size()
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mem_module_size = phys_mem_size / options.num_dirs
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dir_size = MemorySize('0B')
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dir_size.value = mem_module_size
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self.size = dir_size
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class DirCntrl(Directory_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.response_latency = 30
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self.directory = DirMem()
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self.directory.create(options, ruby_system, system)
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self.L3CacheMemory = L3Cache()
|
|
|
|
|
self.L3CacheMemory.create(options, ruby_system, system)
|
|
|
|
|
self.ProbeFilterMemory = ProbeFilter()
|
|
|
|
|
self.ProbeFilterMemory.create(options, ruby_system, system)
|
|
|
|
|
self.l3_hit_latency = \
|
|
|
|
|
max(self.L3CacheMemory.dataAccessLatency,
|
|
|
|
|
self.L3CacheMemory.tagAccessLatency)
|
|
|
|
|
|
|
|
|
|
self.ruby_system = ruby_system
|
|
|
|
|
if options.recycle_latency:
|
|
|
|
|
self.recycle_latency = options.recycle_latency
|
|
|
|
|
|
|
|
|
|
def connectWireBuffers(self, req_to_dir, resp_to_dir, l3_unblock_to_dir,
|
|
|
|
|
req_to_l3, probe_to_l3, resp_to_l3):
|
|
|
|
|
self.reqToDir = req_to_dir
|
|
|
|
|
self.respToDir = resp_to_dir
|
|
|
|
|
self.l3UnblockToDir = l3_unblock_to_dir
|
|
|
|
|
self.reqToL3 = req_to_l3
|
|
|
|
|
self.probeToL3 = probe_to_l3
|
|
|
|
|
self.respToL3 = resp_to_l3
|
|
|
|
|
|
|
|
|
|
def define_options(parser):
|
|
|
|
|
parser.add_option("--num-subcaches", type = "int", default = 4)
|
|
|
|
|
parser.add_option("--l3-data-latency", type = "int", default = 20)
|
|
|
|
|
parser.add_option("--l3-tag-latency", type = "int", default = 15)
|
|
|
|
|
parser.add_option("--cpu-to-dir-latency", type = "int", default = 120)
|
|
|
|
|
parser.add_option("--gpu-to-dir-latency", type = "int", default = 120)
|
|
|
|
|
parser.add_option("--no-resource-stalls", action = "store_false",
|
|
|
|
|
default = True)
|
|
|
|
|
parser.add_option("--no-tcc-resource-stalls", action = "store_false",
|
|
|
|
|
default = True)
|
|
|
|
|
parser.add_option("--num-tbes", type = "int", default = 2560)
|
|
|
|
|
parser.add_option("--l2-latency", type = "int", default = 50) # load to use
|
|
|
|
|
parser.add_option("--num-tccs", type = "int", default = 1,
|
|
|
|
|
help = "number of TCC banks in the GPU")
|
|
|
|
|
parser.add_option("--sqc-size", type = 'string', default = '32kB',
|
|
|
|
|
help = "SQC cache size")
|
|
|
|
|
parser.add_option("--sqc-assoc", type = 'int', default = 8,
|
|
|
|
|
help = "SQC cache assoc")
|
|
|
|
|
parser.add_option("--region-dir-entries", type = "int", default = 8192)
|
|
|
|
|
parser.add_option("--dir-tag-latency", type = "int", default = 8)
|
|
|
|
|
parser.add_option("--dir-tag-banks", type = "int", default = 4)
|
|
|
|
|
parser.add_option("--blocks-per-region", type = "int", default = 1)
|
|
|
|
|
parser.add_option("--use-L3-on-WT", action = "store_true", default = False)
|
|
|
|
|
parser.add_option("--nonInclusiveDir", action = "store_true",
|
|
|
|
|
default = False)
|
|
|
|
|
parser.add_option("--WB_L1", action = "store_true",
|
|
|
|
|
default = False, help = "writeback L2")
|
|
|
|
|
parser.add_option("--WB_L2", action = "store_true",
|
|
|
|
|
default = False, help = "writeback L2")
|
|
|
|
|
parser.add_option("--TCP_latency", type = "int",
|
|
|
|
|
default = 4, help = "TCP latency")
|
|
|
|
|
parser.add_option("--TCC_latency", type = "int",
|
|
|
|
|
default = 16, help = "TCC latency")
|
|
|
|
|
parser.add_option("--tcc-size", type = 'string', default = '2MB',
|
|
|
|
|
help = "agregate tcc size")
|
|
|
|
|
parser.add_option("--tcc-assoc", type = 'int', default = 16,
|
|
|
|
|
help = "tcc assoc")
|
|
|
|
|
parser.add_option("--tcp-size", type = 'string', default = '16kB',
|
|
|
|
|
help = "tcp size")
|
|
|
|
|
parser.add_option("--sampler-sets", type = "int", default = 1024)
|
|
|
|
|
parser.add_option("--sampler-assoc", type = "int", default = 16)
|
|
|
|
|
parser.add_option("--sampler-counter", type = "int", default = 512)
|
|
|
|
|
parser.add_option("--noL1", action = "store_true", default = False,
|
|
|
|
|
help = "bypassL1")
|
|
|
|
|
parser.add_option("--noL2", action = "store_true", default = False,
|
|
|
|
|
help = "bypassL2")
|
|
|
|
|
|
|
|
|
|
def create_system(options, full_system, system, dma_devices, ruby_system):
|
|
|
|
|
if buildEnv['PROTOCOL'] != 'GPU_VIPER_Baseline':
|
|
|
|
|
panic("This script requires the" \
|
|
|
|
|
"GPU_VIPER_Baseline protocol to be built.")
|
|
|
|
|
|
|
|
|
|
cpu_sequencers = []
|
|
|
|
|
|
|
|
|
|
#
|
|
|
|
|
# The ruby network creation expects the list of nodes in the system to be
|
|
|
|
|
# consistent with the NetDest list. Therefore the l1 controller nodes
|
|
|
|
|
# must be listed before the directory nodes and directory nodes before
|
|
|
|
|
# dma nodes, etc.
|
|
|
|
|
#
|
|
|
|
|
cp_cntrl_nodes = []
|
|
|
|
|
tcp_cntrl_nodes = []
|
|
|
|
|
sqc_cntrl_nodes = []
|
|
|
|
|
tcc_cntrl_nodes = []
|
|
|
|
|
dir_cntrl_nodes = []
|
|
|
|
|
l3_cntrl_nodes = []
|
|
|
|
|
|
|
|
|
|
#
|
|
|
|
|
# Must create the individual controllers before the network to ensure the
|
|
|
|
|
# controller constructors are called before the network constructor
|
|
|
|
|
#
|
|
|
|
|
|
|
|
|
|
# For an odd number of CPUs, still create the right number of controllers
|
|
|
|
|
TCC_bits = int(math.log(options.num_tccs, 2))
|
|
|
|
|
|
|
|
|
|
# This is the base crossbar that connects the L3s, Dirs, and cpu/gpu
|
|
|
|
|
# Clusters
|
|
|
|
|
crossbar_bw = 16 * options.num_compute_units #Assuming a 2GHz clock
|
|
|
|
|
mainCluster = Cluster(intBW = crossbar_bw)
|
|
|
|
|
for i in xrange(options.num_dirs):
|
|
|
|
|
|
|
|
|
|
dir_cntrl = DirCntrl(noTCCdir=True,TCC_select_num_bits = TCC_bits)
|
|
|
|
|
dir_cntrl.create(options, ruby_system, system)
|
|
|
|
|
dir_cntrl.number_of_TBEs = options.num_tbes
|
|
|
|
|
dir_cntrl.useL3OnWT = options.use_L3_on_WT
|
|
|
|
|
dir_cntrl.inclusiveDir = not options.nonInclusiveDir
|
|
|
|
|
|
|
|
|
|
# Connect the Directory controller to the ruby network
|
|
|
|
|
dir_cntrl.requestFromCores = MessageBuffer(ordered = True)
|
|
|
|
|
dir_cntrl.requestFromCores.slave = ruby_system.network.master
|
|
|
|
|
|
|
|
|
|
dir_cntrl.responseFromCores = MessageBuffer()
|
|
|
|
|
dir_cntrl.responseFromCores.slave = ruby_system.network.master
|
|
|
|
|
|
|
|
|
|
dir_cntrl.unblockFromCores = MessageBuffer()
|
|
|
|
|
dir_cntrl.unblockFromCores.slave = ruby_system.network.master
|
|
|
|
|
|
|
|
|
|
dir_cntrl.probeToCore = MessageBuffer()
|
|
|
|
|
dir_cntrl.probeToCore.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
dir_cntrl.responseToCore = MessageBuffer()
|
|
|
|
|
dir_cntrl.responseToCore.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
dir_cntrl.triggerQueue = MessageBuffer(ordered = True)
|
|
|
|
|
dir_cntrl.L3triggerQueue = MessageBuffer(ordered = True)
|
|
|
|
|
dir_cntrl.responseFromMemory = MessageBuffer()
|
|
|
|
|
|
|
|
|
|
exec("system.dir_cntrl%d = dir_cntrl" % i)
|
|
|
|
|
dir_cntrl_nodes.append(dir_cntrl)
|
|
|
|
|
mainCluster.add(dir_cntrl)
|
|
|
|
|
|
|
|
|
|
cpuCluster = Cluster(extBW = crossbar_bw, intBW=crossbar_bw)
|
|
|
|
|
for i in xrange((options.num_cpus + 1) / 2):
|
|
|
|
|
|
|
|
|
|
cp_cntrl = CPCntrl()
|
|
|
|
|
cp_cntrl.create(options, ruby_system, system)
|
|
|
|
|
|
|
|
|
|
exec("system.cp_cntrl%d = cp_cntrl" % i)
|
|
|
|
|
#
|
|
|
|
|
# Add controllers and sequencers to the appropriate lists
|
|
|
|
|
#
|
|
|
|
|
cpu_sequencers.extend([cp_cntrl.sequencer, cp_cntrl.sequencer1])
|
|
|
|
|
|
|
|
|
|
# Connect the CP controllers and the network
|
|
|
|
|
cp_cntrl.requestFromCore = MessageBuffer()
|
|
|
|
|
cp_cntrl.requestFromCore.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
cp_cntrl.responseFromCore = MessageBuffer()
|
|
|
|
|
cp_cntrl.responseFromCore.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
cp_cntrl.unblockFromCore = MessageBuffer()
|
|
|
|
|
cp_cntrl.unblockFromCore.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
cp_cntrl.probeToCore = MessageBuffer()
|
|
|
|
|
cp_cntrl.probeToCore.slave = ruby_system.network.master
|
|
|
|
|
|
|
|
|
|
cp_cntrl.responseToCore = MessageBuffer()
|
|
|
|
|
cp_cntrl.responseToCore.slave = ruby_system.network.master
|
|
|
|
|
|
|
|
|
|
cp_cntrl.mandatoryQueue = MessageBuffer()
|
|
|
|
|
cp_cntrl.triggerQueue = MessageBuffer(ordered = True)
|
|
|
|
|
|
|
|
|
|
cpuCluster.add(cp_cntrl)
|
|
|
|
|
|
|
|
|
|
gpuCluster = Cluster(extBW = crossbar_bw, intBW = crossbar_bw)
|
|
|
|
|
for i in xrange(options.num_compute_units):
|
|
|
|
|
|
|
|
|
|
tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits,
|
|
|
|
|
issue_latency = 1,
|
|
|
|
|
number_of_TBEs = 2560)
|
|
|
|
|
# TBEs set to max outstanding requests
|
|
|
|
|
tcp_cntrl.create(options, ruby_system, system)
|
|
|
|
|
tcp_cntrl.WB = options.WB_L1
|
|
|
|
|
tcp_cntrl.disableL1 = options.noL1
|
|
|
|
|
|
|
|
|
|
exec("system.tcp_cntrl%d = tcp_cntrl" % i)
|
|
|
|
|
#
|
|
|
|
|
# Add controllers and sequencers to the appropriate lists
|
|
|
|
|
#
|
|
|
|
|
cpu_sequencers.append(tcp_cntrl.coalescer)
|
|
|
|
|
tcp_cntrl_nodes.append(tcp_cntrl)
|
|
|
|
|
|
|
|
|
|
# Connect the CP (TCP) controllers to the ruby network
|
|
|
|
|
tcp_cntrl.requestFromTCP = MessageBuffer(ordered = True)
|
|
|
|
|
tcp_cntrl.requestFromTCP.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
tcp_cntrl.responseFromTCP = MessageBuffer(ordered = True)
|
|
|
|
|
tcp_cntrl.responseFromTCP.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
tcp_cntrl.unblockFromCore = MessageBuffer()
|
|
|
|
|
tcp_cntrl.unblockFromCore.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
tcp_cntrl.probeToTCP = MessageBuffer(ordered = True)
|
|
|
|
|
tcp_cntrl.probeToTCP.slave = ruby_system.network.master
|
|
|
|
|
|
|
|
|
|
tcp_cntrl.responseToTCP = MessageBuffer(ordered = True)
|
|
|
|
|
tcp_cntrl.responseToTCP.slave = ruby_system.network.master
|
|
|
|
|
|
|
|
|
|
tcp_cntrl.mandatoryQueue = MessageBuffer()
|
|
|
|
|
|
|
|
|
|
gpuCluster.add(tcp_cntrl)
|
|
|
|
|
|
|
|
|
|
for i in xrange(options.num_sqc):
|
|
|
|
|
|
|
|
|
|
sqc_cntrl = SQCCntrl(TCC_select_num_bits = TCC_bits)
|
|
|
|
|
sqc_cntrl.create(options, ruby_system, system)
|
|
|
|
|
|
|
|
|
|
exec("system.sqc_cntrl%d = sqc_cntrl" % i)
|
|
|
|
|
#
|
|
|
|
|
# Add controllers and sequencers to the appropriate lists
|
|
|
|
|
#
|
|
|
|
|
cpu_sequencers.append(sqc_cntrl.sequencer)
|
|
|
|
|
|
|
|
|
|
# Connect the SQC controller to the ruby network
|
|
|
|
|
sqc_cntrl.requestFromSQC = MessageBuffer(ordered = True)
|
|
|
|
|
sqc_cntrl.requestFromSQC.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
sqc_cntrl.probeToSQC = MessageBuffer(ordered = True)
|
|
|
|
|
sqc_cntrl.probeToSQC.slave = ruby_system.network.master
|
|
|
|
|
|
|
|
|
|
sqc_cntrl.responseToSQC = MessageBuffer(ordered = True)
|
|
|
|
|
sqc_cntrl.responseToSQC.slave = ruby_system.network.master
|
|
|
|
|
|
|
|
|
|
sqc_cntrl.mandatoryQueue = MessageBuffer()
|
|
|
|
|
|
|
|
|
|
# SQC also in GPU cluster
|
|
|
|
|
gpuCluster.add(sqc_cntrl)
|
|
|
|
|
|
|
|
|
|
# Because of wire buffers, num_tccs must equal num_tccdirs
|
|
|
|
|
numa_bit = 6
|
|
|
|
|
|
|
|
|
|
for i in xrange(options.num_tccs):
|
|
|
|
|
|
|
|
|
|
tcc_cntrl = TCCCntrl()
|
|
|
|
|
tcc_cntrl.create(options, ruby_system, system)
|
|
|
|
|
tcc_cntrl.l2_request_latency = options.gpu_to_dir_latency
|
|
|
|
|
tcc_cntrl.l2_response_latency = options.TCC_latency
|
|
|
|
|
tcc_cntrl_nodes.append(tcc_cntrl)
|
|
|
|
|
tcc_cntrl.WB = options.WB_L2
|
|
|
|
|
tcc_cntrl.number_of_TBEs = 2560 * options.num_compute_units
|
|
|
|
|
|
|
|
|
|
# Connect the TCC controllers to the ruby network
|
|
|
|
|
tcc_cntrl.requestFromTCP = MessageBuffer(ordered = True)
|
|
|
|
|
tcc_cntrl.requestFromTCP.slave = ruby_system.network.master
|
|
|
|
|
|
|
|
|
|
tcc_cntrl.responseToCore = MessageBuffer(ordered = True)
|
|
|
|
|
tcc_cntrl.responseToCore.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
tcc_cntrl.probeFromNB = MessageBuffer()
|
|
|
|
|
tcc_cntrl.probeFromNB.slave = ruby_system.network.master
|
|
|
|
|
|
|
|
|
|
tcc_cntrl.responseFromNB = MessageBuffer()
|
|
|
|
|
tcc_cntrl.responseFromNB.slave = ruby_system.network.master
|
|
|
|
|
|
|
|
|
|
tcc_cntrl.requestToNB = MessageBuffer(ordered = True)
|
|
|
|
|
tcc_cntrl.requestToNB.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
tcc_cntrl.responseToNB = MessageBuffer()
|
|
|
|
|
tcc_cntrl.responseToNB.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
tcc_cntrl.unblockToNB = MessageBuffer()
|
|
|
|
|
tcc_cntrl.unblockToNB.master = ruby_system.network.slave
|
|
|
|
|
|
|
|
|
|
tcc_cntrl.triggerQueue = MessageBuffer(ordered = True)
|
|
|
|
|
|
|
|
|
|
exec("system.tcc_cntrl%d = tcc_cntrl" % i)
|
|
|
|
|
# connect all of the wire buffers between L3 and dirs up
|
|
|
|
|
# TCC cntrls added to the GPU cluster
|
|
|
|
|
gpuCluster.add(tcc_cntrl)
|
|
|
|
|
|
|
|
|
|
# Assuming no DMA devices
|
|
|
|
|
assert(len(dma_devices) == 0)
|
|
|
|
|
|
|
|
|
|
# Add cpu/gpu clusters to main cluster
|
|
|
|
|
mainCluster.add(cpuCluster)
|
|
|
|
|
mainCluster.add(gpuCluster)
|
|
|
|
|
|
|
|
|
|
ruby_system.network.number_of_virtual_networks = 10
|
|
|
|
|
|
|
|
|
|
return (cpu_sequencers, dir_cntrl_nodes, mainCluster)
|
