gem5/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/simerr

warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
warn: Sockets disabled, not accepting terminal connections
warn: Sockets disabled, not accepting gdb connections
warn: Reading current count from inactive timer.
warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
warn: Don't know what interrupt to clear for console.
warn: x86 cpuid: unknown family 0x8086
warn: instruction 'wbinvd' unimplemented
warn: instruction 'wbinvd' unimplemented
warn: x86 cpuid: unknown family 0x8086
hack: Assuming logical destinations are 1 << id.
warn: Tried to clear PCI interrupt 14
warn: Unknown mouse command 0xe1.
stats: more updates due to PCI changes A couple of the long regressions have been showing as CHANGED since 11244:a2af58a06c4e despite the updates in 11245:1c5102c0a7a9. The x86 regression looks like it was just missed, but it's not clear why the ARM one is giving different results (perhaps a non-determinism between zizzer and wherever the updated results were run?). 2015-12-30 17:18:44 +01:00			`warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)`
Regression: Add a test for x86 timing full system ruby simulation 2012-04-26 05:43:36 +02:00			`warn: Sockets disabled, not accepting terminal connections`
			`warn: Sockets disabled, not accepting gdb connections`
stats: more updates due to PCI changes A couple of the long regressions have been showing as CHANGED since 11244:a2af58a06c4e despite the updates in 11245:1c5102c0a7a9. The x86 regression looks like it was just missed, but it's not clear why the ARM one is giving different results (perhaps a non-determinism between zizzer and wherever the updated results were run?). 2015-12-30 17:18:44 +01:00			`warn: Reading current count from inactive timer.`
			`warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!`
Regression: Add a test for x86 timing full system ruby simulation 2012-04-26 05:43:36 +02:00			`warn: Don't know what interrupt to clear for console.`
stats: revert pc-simple-timing-ruby-MESI_CMP_directory to before last update 2012-07-30 18:11:25 +02:00			`warn: x86 cpuid: unknown family 0x8086`
Regression: Add a test for x86 timing full system ruby simulation 2012-04-26 05:43:36 +02:00			`warn: instruction 'wbinvd' unimplemented`
			`warn: instruction 'wbinvd' unimplemented`
stats: revert pc-simple-timing-ruby-MESI_CMP_directory to before last update 2012-07-30 18:11:25 +02:00			`warn: x86 cpuid: unknown family 0x8086`
Regression: Add a test for x86 timing full system ruby simulation 2012-04-26 05:43:36 +02:00			`hack: Assuming logical destinations are 1 << id.`
			`warn: Tried to clear PCI interrupt 14`
			`warn: Unknown mouse command 0xe1.`