263 lines
8.9 KiB
C
263 lines
8.9 KiB
C
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/*****************************************************************************
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* McPAT
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* SOFTWARE LICENSE AGREEMENT
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* Copyright 2012 Hewlett-Packard Development Company, L.P.
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* All Rights Reserved
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.”
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*
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***************************************************************************/
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#ifndef CORE_H_
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#define CORE_H_
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#include "XML_Parse.h"
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#include "array.h"
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#include "basic_components.h"
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#include "interconnect.h"
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#include "logic.h"
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#include "parameter.h"
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#include "sharedcache.h"
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class BranchPredictor :public Component {
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public:
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ParseXML *XML;
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int ithCore;
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InputParameter interface_ip;
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CoreDynParam coredynp;
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double clockRate,executionTime;
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double scktRatio, chip_PR_overhead, macro_PR_overhead;
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ArrayST * globalBPT;
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ArrayST * localBPT;
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ArrayST * L1_localBPT;
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ArrayST * L2_localBPT;
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ArrayST * chooser;
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ArrayST * RAS;
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bool exist;
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BranchPredictor(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, bool exsit=true);
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void computeEnergy(bool is_tdp=true);
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void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
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~BranchPredictor();
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};
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class InstFetchU :public Component {
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public:
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ParseXML *XML;
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int ithCore;
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InputParameter interface_ip;
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CoreDynParam coredynp;
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double clockRate,executionTime;
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double scktRatio, chip_PR_overhead, macro_PR_overhead;
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enum Cache_policy cache_p;
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InstCache icache;
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ArrayST * IB;
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ArrayST * BTB;
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BranchPredictor * BPT;
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inst_decoder * ID_inst;
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inst_decoder * ID_operand;
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inst_decoder * ID_misc;
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bool exist;
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InstFetchU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, bool exsit=true);
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void computeEnergy(bool is_tdp=true);
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void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
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~InstFetchU();
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};
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class SchedulerU :public Component {
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public:
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ParseXML *XML;
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int ithCore;
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InputParameter interface_ip;
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CoreDynParam coredynp;
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double clockRate,executionTime;
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double scktRatio, chip_PR_overhead, macro_PR_overhead;
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double Iw_height, fp_Iw_height,ROB_height;
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ArrayST * int_inst_window;
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ArrayST * fp_inst_window;
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ArrayST * ROB;
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selection_logic * instruction_selection;
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bool exist;
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SchedulerU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, bool exist_=true);
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void computeEnergy(bool is_tdp=true);
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void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
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~SchedulerU();
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};
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class RENAMINGU :public Component {
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public:
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ParseXML *XML;
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int ithCore;
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InputParameter interface_ip;
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double clockRate,executionTime;
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CoreDynParam coredynp;
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ArrayST * iFRAT;
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ArrayST * fFRAT;
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ArrayST * iRRAT;
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ArrayST * fRRAT;
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ArrayST * ifreeL;
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ArrayST * ffreeL;
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dep_resource_conflict_check * idcl;
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dep_resource_conflict_check * fdcl;
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ArrayST * RAHT;//register alias history table Used to store GC
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bool exist;
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RENAMINGU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_, const CoreDynParam & dyn_p_, bool exist_=true);
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void computeEnergy(bool is_tdp=true);
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void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
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~RENAMINGU();
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};
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class LoadStoreU :public Component {
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public:
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ParseXML *XML;
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int ithCore;
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InputParameter interface_ip;
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CoreDynParam coredynp;
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enum Cache_policy cache_p;
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double clockRate,executionTime;
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double scktRatio, chip_PR_overhead, macro_PR_overhead;
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double lsq_height;
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DataCache dcache;
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ArrayST * LSQ;//it is actually the store queue but for inorder processors it serves as both loadQ and StoreQ
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ArrayST * LoadQ;
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bool exist;
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LoadStoreU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, bool exist_=true);
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void computeEnergy(bool is_tdp=true);
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void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
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~LoadStoreU();
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};
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class MemManU :public Component {
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public:
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ParseXML *XML;
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int ithCore;
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InputParameter interface_ip;
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CoreDynParam coredynp;
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double clockRate,executionTime;
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double scktRatio, chip_PR_overhead, macro_PR_overhead;
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ArrayST * itlb;
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ArrayST * dtlb;
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bool exist;
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MemManU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, bool exist_=true);
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void computeEnergy(bool is_tdp=true);
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void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
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~MemManU();
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};
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class RegFU :public Component {
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public:
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ParseXML *XML;
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int ithCore;
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InputParameter interface_ip;
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CoreDynParam coredynp;
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double clockRate,executionTime;
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double scktRatio, chip_PR_overhead, macro_PR_overhead;
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double int_regfile_height, fp_regfile_height;
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ArrayST * IRF;
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ArrayST * FRF;
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ArrayST * RFWIN;
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bool exist;
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RegFU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, bool exist_=true);
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void computeEnergy(bool is_tdp=true);
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void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
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~RegFU();
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};
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class EXECU :public Component {
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public:
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ParseXML *XML;
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int ithCore;
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InputParameter interface_ip;
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double clockRate,executionTime;
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double scktRatio, chip_PR_overhead, macro_PR_overhead;
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double lsq_height;
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CoreDynParam coredynp;
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RegFU * rfu;
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SchedulerU * scheu;
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FunctionalUnit * fp_u;
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FunctionalUnit * exeu;
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FunctionalUnit * mul;
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interconnect * int_bypass;
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interconnect * intTagBypass;
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interconnect * int_mul_bypass;
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interconnect * intTag_mul_Bypass;
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interconnect * fp_bypass;
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interconnect * fpTagBypass;
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Component bypass;
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bool exist;
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EXECU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_, double lsq_height_,const CoreDynParam & dyn_p_, bool exist_=true);
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void computeEnergy(bool is_tdp=true);
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void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
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~EXECU();
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};
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class Core :public Component {
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public:
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ParseXML *XML;
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int ithCore;
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InputParameter interface_ip;
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double clockRate,executionTime;
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double scktRatio, chip_PR_overhead, macro_PR_overhead;
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InstFetchU * ifu;
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LoadStoreU * lsu;
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MemManU * mmu;
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EXECU * exu;
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RENAMINGU * rnu;
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Pipeline * corepipe;
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UndiffCore * undiffCore;
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SharedCache * l2cache;
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CoreDynParam coredynp;
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//full_decoder inst_decoder;
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//clock_network clockNetwork;
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Core(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_);
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void set_core_param();
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void computeEnergy(bool is_tdp=true);
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void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
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~Core();
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};
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#endif /* CORE_H_ */
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