gem5/src/arch/x86/isa/microops/ldstop.isa

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// Authors: Gabe Black

//////////////////////////////////////////////////////////////////////////
//
// LdStOp Microop templates
//
//////////////////////////////////////////////////////////////////////////

def template MicroLdStOpDeclare {{
    class %(class_name)s : public X86MicroopBase
    {
      protected:
        const uint8_t scale;
        const RegIndex index;
        const RegIndex base;
        const uint64_t disp;
        const uint8_t segment;
        const RegIndex data;
        const uint8_t dataSize;
        const uint8_t addressSize;
        void buildMe();

      public:
        %(class_name)s(ExtMachInst _machInst,
                const char * instMnem,
                bool isMicro, bool isDelayed, bool isFirst, bool isLast,
                uint8_t _scale, RegIndex _index, RegIndex _base,
                uint64_t _disp, uint8_t _segment,
                RegIndex _data,
                uint8_t _dataSize, uint8_t _addressSize);

        %(class_name)s(ExtMachInst _machInst,
                const char * instMnem,
                uint8_t _scale, RegIndex _index, RegIndex _base,
                uint64_t _disp, uint8_t _segment,
                RegIndex _data,
                uint8_t _dataSize, uint8_t _addressSize);

        %(BasicExecDeclare)s
    };
}};

def template MicroLdStOpConstructor {{

    inline void %(class_name)s::buildMe()
    {
        %(constructor)s;
    }

    inline %(class_name)s::%(class_name)s(
            ExtMachInst machInst, const char * instMnem,
            uint8_t _scale, RegIndex _index, RegIndex _base,
            uint64_t _disp, uint8_t _segment,
            RegIndex _data,
            uint8_t _dataSize, uint8_t _addressSize) :
        %(base_class)s(machInst, "%(mnemonic)s", instMnem,
                false, false, false, false, %(op_class)s),
                scale(_scale), index(_index), base(_base),
                disp(_disp), segment(_segment),
                data(_data),
                dataSize(_dataSize), addressSize(_addressSize)
    {
        buildMe();
    }

    inline %(class_name)s::%(class_name)s(
            ExtMachInst machInst, const char * instMnem,
            bool isMicro, bool isDelayed, bool isFirst, bool isLast,
            uint8_t _scale, RegIndex _index, RegIndex _base,
            uint64_t _disp, uint8_t segment,
            RegIndex data,
            uint8_t dataSize, uint8_t addressSize) :
        %(base_class)s(machInst, "%(mnemonic)s", instMnem,
                isMicro, isDelayed, isFirst, isLast, %(op_class)s),
                scale(_scale), index(_index), base(_base),
                disp(_disp), segment(_segment),
                data(_data),
                dataSize(_dataSize), addressSize(_addressSize)
    {
        buildMe();
    }
}};