gem5/src/cpu/minor/stats.cc

/*
 * Copyright (c) 2012-2014 ARM Limited
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 * this software without specific prior written permission.
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 * Authors: Andrew Bardsley
 */

#include "cpu/minor/stats.hh"

namespace Minor
{

MinorStats::MinorStats()
{ }

void
MinorStats::regStats(const std::string &name, BaseCPU &baseCpu)
{
    numInsts
        .name(name + ".committedInsts")
        .desc("Number of instructions committed");

    numOps
        .name(name + ".committedOps")
        .desc("Number of ops (including micro ops) committed");

    numDiscardedOps
        .name(name + ".discardedOps")
        .desc("Number of ops (including micro ops) which were discarded "
            "before commit");

    numFetchSuspends
        .name(name + ".numFetchSuspends")
        .desc("Number of times Execute suspended instruction fetching");

    quiesceCycles
        .name(name + ".quiesceCycles")
        .desc("Total number of cycles that CPU has spent quiesced or waiting "
              "for an interrupt")
        .prereq(quiesceCycles);

    cpi
        .name(name + ".cpi")
        .desc("CPI: cycles per instruction")
        .precision(6);
    cpi = baseCpu.numCycles / numInsts;

    ipc
        .name(name + ".ipc")
        .desc("IPC: instructions per cycle")
        .precision(6);
    ipc = numInsts / baseCpu.numCycles;

    committedInstType
        .init(baseCpu.numThreads, Enums::Num_OpClass)
        .name(name + ".op_class")
        .desc("Class of committed instruction")
        .flags(Stats::total | Stats::pdf | Stats::dist);
    committedInstType.ysubnames(Enums::OpClassStrings);
}

};