2015-07-07 11:03:13 +02:00
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/*
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2016-01-29 13:14:21 +01:00
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* Copyright (c) 2014-2016 ARM Limited
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2015-07-07 11:03:13 +02:00
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* All rights reserved
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* Authors: Andreas Sandberg
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*/
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#include "mmu.hh"
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#include "gpu.hh"
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#include "regutils.hh"
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namespace NoMali {
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MMU::MMU(GPU &_gpu)
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: GPUBlockInt(_gpu,
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RegAddr(MMU_IRQ_RAWSTAT),
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RegAddr(MMU_IRQ_CLEAR),
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RegAddr(MMU_IRQ_MASK),
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2016-01-29 13:14:21 +01:00
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RegAddr(MMU_IRQ_STATUS))
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2015-07-07 11:03:13 +02:00
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{
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2016-01-29 13:14:21 +01:00
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spaces.reserve(16);
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for (int i = 0; i < 16; ++i)
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spaces.emplace_back(_gpu, *this, i);
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2015-07-07 11:03:13 +02:00
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}
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MMU::~MMU()
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{
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}
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2016-01-29 13:14:21 +01:00
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void
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MMU::reset()
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{
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GPUBlockInt::reset();
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for (auto &as : spaces)
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as.reset();
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}
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uint32_t
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MMU::readReg(RegAddr addr)
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{
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if (isAddrSpaceReg(addr)) {
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return spaces[getAddrSpaceNo(addr)].readReg(getAddrSpaceAddr(addr));
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} else {
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return GPUBlockInt::readReg(addr);
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}
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}
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2015-07-07 11:03:13 +02:00
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void
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MMU::writeReg(RegAddr addr, uint32_t value)
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{
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switch (addr.value) {
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case MMU_IRQ_RAWSTAT:
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case MMU_IRQ_CLEAR:
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case MMU_IRQ_MASK:
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case MMU_IRQ_STATUS:
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GPUBlockInt::writeReg(addr, value);
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break;
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default:
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2016-01-29 13:14:21 +01:00
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if (isAddrSpaceReg(addr)) {
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AddrSpace &as(spaces[getAddrSpaceNo(addr)]);
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as.writeReg(getAddrSpaceAddr(addr), value);
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}
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2015-07-07 11:03:13 +02:00
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break;
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};
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}
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2016-01-29 13:14:21 +01:00
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uint32_t
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MMU::readRegRaw(RegAddr addr)
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{
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if (isAddrSpaceReg(addr)) {
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return spaces[getAddrSpaceNo(addr)].readRegRaw(getAddrSpaceAddr(addr));
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} else {
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return GPUBlockInt::readRegRaw(addr);
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}
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}
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void
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MMU::writeRegRaw(RegAddr addr, uint32_t value)
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{
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if (isAddrSpaceReg(addr)) {
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spaces[getAddrSpaceNo(addr)].writeRegRaw(getAddrSpaceAddr(addr), value);
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} else {
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GPUBlockInt::writeRegRaw(addr, value);
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}
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}
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2015-07-07 11:03:13 +02:00
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void
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MMU::onInterrupt(int set)
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{
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gpu.intMMU(set);
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}
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}
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