169 lines
5.9 KiB
C
169 lines
5.9 KiB
C
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/*
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* Copyright (c) 2012-2014, TU Delft
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* Copyright (c) 2012-2014, TU Eindhoven
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* Copyright (c) 2012-2014, TU Kaiserslautern
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Karthik Chandrasekar
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*
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*/
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#ifndef CMDSCHEDULER_H
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#define CMDSCHEDULER_H
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#include <string>
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#include <vector>
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#include <functional> // for binary_function<>
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#include <fstream>
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#include "MemorySpecification.h"
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#include "Utils.h"
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namespace Data {
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class cmdScheduler {
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public:
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#define READ 0
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#define WRITE 1
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#define ACTIVATE 2
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#define PRECHARGE 3
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#define POWER_DOWN 1
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#define SELF_REFRESH 2
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// the format of a transaction.
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class trans {
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public:
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int type;
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double timeStamp;
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unsigned logicalAddress;
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};
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std::vector<trans> transTrace; // to store the transactions.
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// the format of physical address.
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class physicalAddr {
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public:
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unsigned rowAddr;
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unsigned bankAddr;
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unsigned bankGroupAddr;
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unsigned colAddr;
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};
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// the format of a command.
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class commandItem {
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public:
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int Type;
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int bank;
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double time;
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std::string name;
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physicalAddr PhysicalAddr;
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// sorting the commands according to their scheduling time.
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struct commandItemSorter : public std::binary_function<commandItem&,
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commandItem&, bool>{
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bool operator()(const commandItem& lhs,
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const commandItem& rhs) const
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{
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return lhs.time < rhs.time;
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}
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};
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};
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commandItem cmd;
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commandItem transFinish; // the last scheduled command for a transaction.
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commandItem PreRDWR; // the latest scheduled READ or WRITE command.
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// the scheduled ACTIVATE commands are stored in ACT.
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std::vector<commandItem> ACT;
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// PRE is sued to keep recording the time when a precharge occurs.
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std::vector<commandItem> PRE;
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// the scheduled READ or WRITE commands are stored in RDWR.
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std::vector<std::vector<commandItem> > RDWR;
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// all the scheduled commands for a transaction is stored by cmdScheduling.
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std::vector<commandItem> cmdScheduling;
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std::vector<commandItem> cmdList;
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unsigned elements;
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int BI, BC, BGI;
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// the function used to translate a transaction into a sequence of
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// commands which are scheduled to the memory.
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void transTranslation(Data::MemorySpecification memSpec,
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std::ifstream& trans_trace,
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int grouping,
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int interleaving,
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int burst,
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int powerdown);
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// get the transactions by reading the traces.
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void getTrans(std::ifstream& pwr_trace,
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MemorySpecification memSpec);
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// the initialization function for scheduling.
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void schedulingInitialization(MemorySpecification memSpec);
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// the function used to schedule commands according to the timing constraints.
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void analyticalScheduling(MemorySpecification memSpec);
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// translate the logical address into physical address.
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physicalAddr memoryMap(trans Trans,
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MemorySpecification memSpec);
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// the power down and power up are scheduled by pdScheduling
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void pdScheduling(double endTime,
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double timer,
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MemorySpecification memSpec);
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// get the timings for scheduling a precharge since a read or write command
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// is scheduled.
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int getRWTP(int transType,
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MemorySpecification memSpec);
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// get different kind of timing constraints according to the used memory.
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void getTimingConstraints(bool BGSwitch,
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MemorySpecification memSpec,
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int PreType,
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int CurrentType);
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double transTime;
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// the flag for power down.
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int power_down;
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int Inselfrefresh;
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int tRRD_init;
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int tCCD_init;
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int tWTR_init;
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double tREF;
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double tSwitch_init;
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double tRWTP;
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int bankaccess;
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unsigned nBanks;
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unsigned nColumns;
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unsigned burstLength;
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unsigned nbrOfBankGroups;
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bool timingsGet;
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double startTime;
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// the scheduling results for all the transactions are written into
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// commands which will be used by the power analysis part.
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std::ofstream commands;
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};
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}
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#endif // ifndef CMDSCHEDULER_H
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