2004-06-27 03:26:28 +02:00
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/*
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2005-06-05 11:16:00 +02:00
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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2004-06-27 03:26:28 +02:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2005-06-05 07:22:21 +02:00
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/** @file
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2004-06-27 03:26:28 +02:00
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* Implements a 8250 UART
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*/
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#include <string>
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#include <vector>
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#include "base/inifile.hh"
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#include "base/str.hh" // for to_number
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#include "base/trace.hh"
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#include "dev/simconsole.hh"
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#include "dev/uart.hh"
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#include "dev/platform.hh"
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#include "mem/bus/bus.hh"
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#include "mem/bus/pio_interface.hh"
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#include "mem/bus/pio_interface_impl.hh"
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2005-06-05 02:50:10 +02:00
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#include "mem/functional/memory_control.hh"
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2004-06-27 03:26:28 +02:00
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#include "sim/builder.hh"
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using namespace std;
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Uart::Uart(const string &name, SimConsole *c, MemoryController *mmu, Addr a,
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2004-07-13 04:58:22 +02:00
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Addr s, HierParams *hier, Bus *bus, Tick pio_latency, Platform *p)
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2005-06-05 07:22:21 +02:00
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: PioDevice(name, p), addr(a), size(s), cons(c)
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2004-06-27 03:26:28 +02:00
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{
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2004-10-22 07:34:40 +02:00
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mmu->add_child(this, RangeSize(addr, size));
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2004-06-27 03:26:28 +02:00
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if (bus) {
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pioInterface = newPioInterface(name, hier, bus, this,
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&Uart::cacheAccess);
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2004-10-22 07:34:40 +02:00
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pioInterface->addAddrRange(RangeSize(addr, size));
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2005-06-02 03:44:00 +02:00
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pioLatency = pio_latency * bus->clockRate;
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2004-06-27 03:26:28 +02:00
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}
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status = 0;
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// set back pointers
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cons->uart = this;
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platform->uart = this;
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}
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Tick
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Uart::cacheAccess(MemReqPtr &req)
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{
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2004-07-13 04:58:22 +02:00
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return curTick + pioLatency;
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2004-06-27 03:26:28 +02:00
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}
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2005-06-05 07:22:21 +02:00
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DEFINE_SIM_OBJECT_CLASS_NAME("Uart", Uart)
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2004-06-27 03:26:28 +02:00
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