2006-05-23 22:51:16 +02:00
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/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2006-05-16 19:59:29 +02:00
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#ifndef __CPU_CHECKER_EXEC_CONTEXT_HH__
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#define __CPU_CHECKER_EXEC_CONTEXT_HH__
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#include "cpu/checker/cpu.hh"
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#include "cpu/cpu_exec_context.hh"
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#include "cpu/exec_context.hh"
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class EndQuiesceEvent;
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2006-05-23 22:51:16 +02:00
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namespace Kernel {
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class Statistics;
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};
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2006-05-16 19:59:29 +02:00
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2006-06-01 21:40:06 +02:00
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/**
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* Derived ExecContext class for use with the Checker. The template
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* parameter is the ExecContext class used by the specific CPU being
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* verified. This CheckerExecContext is then used by the main CPU in
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* place of its usual ExecContext class. It handles updating the
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* checker's state any time state is updated through the ExecContext.
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*/
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2006-05-16 19:59:29 +02:00
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template <class XC>
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class CheckerExecContext : public ExecContext
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{
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public:
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CheckerExecContext(XC *actual_xc,
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CheckerCPU *checker_cpu)
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2006-05-23 22:51:16 +02:00
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: actualXC(actual_xc), checkerXC(checker_cpu->cpuXC),
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checkerCPU(checker_cpu)
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2006-05-16 19:59:29 +02:00
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{ }
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private:
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XC *actualXC;
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CPUExecContext *checkerXC;
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CheckerCPU *checkerCPU;
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public:
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BaseCPU *getCpuPtr() { return actualXC->getCpuPtr(); }
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void setCpuId(int id)
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{
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actualXC->setCpuId(id);
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checkerXC->setCpuId(id);
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}
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int readCpuId() { return actualXC->readCpuId(); }
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FunctionalMemory *getMemPtr() { return actualXC->getMemPtr(); }
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#if FULL_SYSTEM
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System *getSystemPtr() { return actualXC->getSystemPtr(); }
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PhysicalMemory *getPhysMemPtr() { return actualXC->getPhysMemPtr(); }
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AlphaITB *getITBPtr() { return actualXC->getITBPtr(); }
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AlphaDTB *getDTBPtr() { return actualXC->getDTBPtr(); }
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Kernel::Statistics *getKernelStats() { return actualXC->getKernelStats(); }
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2006-05-16 19:59:29 +02:00
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#else
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Process *getProcessPtr() { return actualXC->getProcessPtr(); }
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#endif
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Status status() const { return actualXC->status(); }
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void setStatus(Status new_status)
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{
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actualXC->setStatus(new_status);
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checkerXC->setStatus(new_status);
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}
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2006-05-16 19:59:29 +02:00
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/// Set the status to Active. Optional delay indicates number of
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/// cycles to wait before beginning execution.
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void activate(int delay = 1) { actualXC->activate(delay); }
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/// Set the status to Suspended.
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void suspend() { actualXC->suspend(); }
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/// Set the status to Unallocated.
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void deallocate() { actualXC->deallocate(); }
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/// Set the status to Halted.
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void halt() { actualXC->halt(); }
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#if FULL_SYSTEM
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void dumpFuncProfile() { actualXC->dumpFuncProfile(); }
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#endif
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void takeOverFrom(ExecContext *oldContext)
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{
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actualXC->takeOverFrom(oldContext);
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checkerXC->takeOverFrom(oldContext);
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}
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void regStats(const std::string &name) { actualXC->regStats(name); }
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void serialize(std::ostream &os) { actualXC->serialize(os); }
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void unserialize(Checkpoint *cp, const std::string §ion)
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{ actualXC->unserialize(cp, section); }
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#if FULL_SYSTEM
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EndQuiesceEvent *getQuiesceEvent() { return actualXC->getQuiesceEvent(); }
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Tick readLastActivate() { return actualXC->readLastActivate(); }
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Tick readLastSuspend() { return actualXC->readLastSuspend(); }
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void profileClear() { return actualXC->profileClear(); }
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void profileSample() { return actualXC->profileSample(); }
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#endif
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int getThreadNum() { return actualXC->getThreadNum(); }
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// @todo: Do I need this?
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MachInst getInst() { return actualXC->getInst(); }
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// @todo: Do I need this?
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void copyArchRegs(ExecContext *xc)
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{
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actualXC->copyArchRegs(xc);
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checkerXC->copyArchRegs(xc);
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}
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void clearArchRegs()
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{
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actualXC->clearArchRegs();
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checkerXC->clearArchRegs();
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}
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//
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// New accessors for new decoder.
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//
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uint64_t readIntReg(int reg_idx)
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{ return actualXC->readIntReg(reg_idx); }
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float readFloatRegSingle(int reg_idx)
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{ return actualXC->readFloatRegSingle(reg_idx); }
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double readFloatRegDouble(int reg_idx)
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{ return actualXC->readFloatRegDouble(reg_idx); }
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uint64_t readFloatRegInt(int reg_idx)
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{ return actualXC->readFloatRegInt(reg_idx); }
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void setIntReg(int reg_idx, uint64_t val)
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{
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actualXC->setIntReg(reg_idx, val);
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checkerXC->setIntReg(reg_idx, val);
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}
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void setFloatRegSingle(int reg_idx, float val)
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{
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actualXC->setFloatRegSingle(reg_idx, val);
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checkerXC->setFloatRegSingle(reg_idx, val);
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}
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void setFloatRegDouble(int reg_idx, double val)
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{
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actualXC->setFloatRegDouble(reg_idx, val);
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checkerXC->setFloatRegSingle(reg_idx, val);
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}
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void setFloatRegInt(int reg_idx, uint64_t val)
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{
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actualXC->setFloatRegInt(reg_idx, val);
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checkerXC->setFloatRegInt(reg_idx, val);
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}
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uint64_t readPC() { return actualXC->readPC(); }
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void setPC(uint64_t val)
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{
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actualXC->setPC(val);
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checkerXC->setPC(val);
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checkerCPU->recordPCChange(val);
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}
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uint64_t readNextPC() { return actualXC->readNextPC(); }
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void setNextPC(uint64_t val)
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{
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actualXC->setNextPC(val);
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checkerXC->setNextPC(val);
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checkerCPU->recordNextPCChange(val);
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}
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MiscReg readMiscReg(int misc_reg)
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{ return actualXC->readMiscReg(misc_reg); }
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MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault)
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{ return actualXC->readMiscRegWithEffect(misc_reg, fault); }
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Fault setMiscReg(int misc_reg, const MiscReg &val)
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{
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checkerXC->setMiscReg(misc_reg, val);
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return actualXC->setMiscReg(misc_reg, val);
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}
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Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val)
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{
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checkerXC->setMiscRegWithEffect(misc_reg, val);
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return actualXC->setMiscRegWithEffect(misc_reg, val);
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}
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unsigned readStCondFailures()
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{ return actualXC->readStCondFailures(); }
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void setStCondFailures(unsigned sc_failures)
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{
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checkerXC->setStCondFailures(sc_failures);
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actualXC->setStCondFailures(sc_failures);
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}
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#if FULL_SYSTEM
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bool inPalMode() { return actualXC->inPalMode(); }
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#endif
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// @todo: Fix this!
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bool misspeculating() { return actualXC->misspeculating(); }
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#if !FULL_SYSTEM
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IntReg getSyscallArg(int i) { return actualXC->getSyscallArg(i); }
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// used to shift args for indirect syscall
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void setSyscallArg(int i, IntReg val)
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{
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checkerXC->setSyscallArg(i, val);
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actualXC->setSyscallArg(i, val);
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}
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void setSyscallReturn(SyscallReturn return_value)
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{
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checkerXC->setSyscallReturn(return_value);
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actualXC->setSyscallReturn(return_value);
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}
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Counter readFuncExeInst() { return actualXC->readFuncExeInst(); }
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#endif
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};
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#endif // __CPU_CHECKER_EXEC_CONTEXT_HH__
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