67 lines
3.5 KiB
Python
67 lines
3.5 KiB
Python
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# Copyright (c) 2013-2015 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Rene de Jong
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#
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import sys
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from m5.params import *
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from m5.proxy import *
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from Device import DmaDevice
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from AbstractNVM import *
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class UFSHostDevice(DmaDevice):
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type = 'UFSHostDevice'
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cxx_header = "dev/arm/ufs_device.hh"
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pio_addr = Param.Addr("Address for SCSI configuration slave interface")
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pio_latency = Param.Latency("10ns", "Time between action and write/read \
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result by AMBA DMA Device")
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gic = Param.BaseGic(Parent.any, "Gic to use for interrupting")
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int_num = Param.UInt32("Interrupt number that connects to GIC")
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img_blk_size = Param.UInt32(512, "Size of one image block in bytes")
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# Every image that is added to the vector will generate a new logic unit
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# in the UFS device; Theoretically (when using the driver from Linux
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# kernel 3.9 onwards), this can be as many as eigth. Up to two have been
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# tested.
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image = VectorParam.DiskImage("Disk images")
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# Every logic unit can have its own flash dimensions. So the number of
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# images that have been provided in the image vector, should be equal to
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# the number of flash objects that are created. Each logic unit can have
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# its own flash dimensions; to allow the system to define a hetrogeneous
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# storage system.
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internalflash = VectorParam.AbstractNVM("Describes the internal flash")
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ufs_slots = Param.UInt32(32, "Number of commands that can be queued in \
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the Host controller (min: 1, max: 32)")
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