2012-01-31 16:46:03 +01:00
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/*
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* Copyright (c) 2011 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Geoffrey Blake
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*/
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2012-11-02 17:32:01 +01:00
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#include "cpu/dummy_checker.hh"
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2012-01-31 16:46:03 +01:00
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#include "params/DummyChecker.hh"
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////////////////////////////////////////////////////////////////////////
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//
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// DummyChecker Simulation Object
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//
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DummyChecker *
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DummyCheckerParams::create()
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{
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DummyChecker::Params *params = new DummyChecker::Params();
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params->name = name;
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params->numThreads = numThreads;
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params->max_insts_any_thread = 0;
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params->max_insts_all_threads = 0;
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params->max_loads_any_thread = 0;
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params->max_loads_all_threads = 0;
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params->clock = clock;
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// Hack to touch all parameters. Consider not deriving Checker
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// from BaseCPU..it's not really a CPU in the end.
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Counter temp;
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temp = max_insts_any_thread;
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temp = max_insts_all_threads;
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temp = max_loads_any_thread;
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temp = max_loads_all_threads;
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2012-03-09 15:59:27 +01:00
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temp++;
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2012-01-31 16:46:03 +01:00
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Tick temp2 = progress_interval;
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params->progress_interval = 0;
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temp2++;
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params->itb = itb;
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params->dtb = dtb;
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2013-01-07 19:05:35 +01:00
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params->isa = isa;
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2012-01-31 16:46:03 +01:00
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params->system = system;
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params->cpu_id = cpu_id;
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params->profile = profile;
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params->interrupts = NULL;
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params->workload = workload;
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DummyChecker *cpu = new DummyChecker(params);
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return cpu;
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}
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