234 lines
9.4 KiB
Python
234 lines
9.4 KiB
Python
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# Copyright (c) 2008 The Hewlett-Packard Development Company
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# All rights reserved.
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#
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# Redistribution and use of this software in source and binary forms,
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# with or without modification, are permitted provided that the
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# following conditions are met:
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#
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# The software must be used only for Non-Commercial Use which means any
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# use which is NOT directed to receiving any direct monetary
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# compensation for, or commercial advantage from such use. Illustrative
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# examples of non-commercial use are academic research, personal study,
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# teaching, education and corporate research & development.
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# Illustrative examples of commercial use are distributing products for
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# commercial advantage and providing services using the software for
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# commercial advantage.
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#
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# If you wish to use this software or functionality therein that may be
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# covered by patents for commercial use, please contact:
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# Director of Intellectual Property Licensing
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# Office of Strategy and Technology
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# Hewlett-Packard Company
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# 1501 Page Mill Road
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# Palo Alto, California 94304
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#
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# Redistributions of source code must retain the above copyright notice,
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# this list of conditions and the following disclaimer. Redistributions
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# in binary form must reproduce the above copyright notice, this list of
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# conditions and the following disclaimer in the documentation and/or
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# other materials provided with the distribution. Neither the name of
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# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission. No right of
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# sublicense is granted herewith. Derivatives of the software and
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# output created using the software may be prepared, but only for
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# Non-Commercial Uses. Derivatives of the software may be shared with
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# others provided: (i) the others agree to abide by the list of
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# conditions herein which includes the Non-Commercial Use restrictions;
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# and (ii) such Derivatives of the software include the above copyright
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# notice to acknowledge the contribution from this software where
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# applicable, this list of conditions and the disclaimer below.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Gabe Black
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from m5.params import *
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from m5.SimObject import SimObject
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class X86IntelMPFloatingPointer(SimObject):
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type = 'X86IntelMPFloatingPointer'
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cxx_class = 'X86ISA::IntelMP::FloatingPointer'
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# The minor revision of the spec to support. The major version is assumed
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# to be 1 in accordance with the spec.
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spec_rev = Param.UInt8(4, 'minor revision of the MP spec supported')
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# If no default configuration is used, set this to 0.
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default_config = Param.UInt8(0, 'which default configuration to use')
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imcr_present = Param.Bool(True,
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'whether the IMCR register is present in the APIC')
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class X86IntelMPConfigTable(SimObject):
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type = 'X86IntelMPConfigTable'
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cxx_class = 'X86ISA::IntelMP::ConfigTable'
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spec_rev = Param.UInt8(4, 'minor revision of the MP spec supported')
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oem_id = Param.String("", 'system manufacturer')
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product_id = Param.String("", 'product family')
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oem_table_addr = Param.UInt32(0,
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'pointer to the optional oem configuration table')
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oem_table_size = Param.UInt16(0, 'size of the oem configuration table')
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local_apic = Param.UInt32(0xFEE00000, 'address of the local APIC')
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base_entries = VectorParam.X86IntelMPBaseConfigEntry([],
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'base configuration table entries')
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ext_entries = VectorParam.X86IntelMPExtConfigEntry([],
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'extended configuration table entries')
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class X86IntelMPBaseConfigEntry(SimObject):
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type = 'X86IntelMPBaseConfigEntry'
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cxx_class = 'X86ISA::IntelMP::BaseConfigEntry'
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abstract = True
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class X86IntelMPExtConfigEntry(SimObject):
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type = 'X86IntelMPExtConfigEntry'
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cxx_class = 'X86ISA::IntelMP::ExtConfigEntry'
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abstract = True
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class X86IntelMPProcessor(X86IntelMPBaseConfigEntry):
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type = 'X86IntelMPProcessor'
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cxx_class = 'X86ISA::IntelMP::Processor'
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local_apic_id = Param.UInt8(0, 'local APIC id')
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local_apic_version = Param.UInt8(0,
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'bits 0-7 of the local APIC version register')
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enable = Param.Bool(True, 'if this processor is usable')
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bootstrap = Param.Bool(False, 'if this is the bootstrap processor')
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stepping = Param.UInt8(0)
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model = Param.UInt8(0)
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family = Param.UInt8(0)
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feature_flags = Param.UInt32(0, 'flags returned by the CPUID instruction')
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class X86IntelMPBus(X86IntelMPBaseConfigEntry):
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type = 'X86IntelMPBus'
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cxx_class = 'X86ISA::IntelMP::Bus'
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bus_id = Param.UInt8(0, 'bus id assigned by the bios')
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bus_type = Param.String("", 'string that identify the bus type')
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# Legal values for bus_type are:
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#
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# "CBUS", "CBUSII", "EISA", "FUTURE", "INTERN", "ISA", "MBI", "MBII",
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# "MCA", "MPI", "MPSA", "NUBUS", "PCI", "PCMCIA", "TC", "VL", "VME",
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# "XPRESS"
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class X86IntelMPIOAPIC(X86IntelMPBaseConfigEntry):
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type = 'X86IntelMPIOAPIC'
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cxx_class = 'X86ISA::IntelMP::IOAPIC'
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id = Param.UInt8(0, 'id of this APIC')
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version = Param.UInt8(0, 'bits 0-7 of the version register')
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enable = Param.Bool(True, 'if this APIC is usable')
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address = Param.UInt32(0xfec00000, 'address of this APIC')
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class X86IntelMPInterruptType(Enum):
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map = {'INT' : 0,
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'NMI' : 1,
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'SMI' : 2,
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'ExtInt' : 3
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}
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class X86IntelMPPolarity(Enum):
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map = {'ConformPolarity' : 0,
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'ActiveHigh' : 1,
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'ActiveLow' : 3
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}
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class X86IntelMPTriggerMode(Enum):
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map = {'ConformTrigger' : 0,
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'EdgeTrigger' : 1,
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'LevelTrigger' : 3
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}
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class X86IntelMPIOIntAssignment(X86IntelMPBaseConfigEntry):
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type = 'X86IntelMPIOIntAssignment'
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cxx_class = 'X86ISA::IntelMP::IOIntAssignment'
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interrupt_type = Param.X86IntelMPInterruptType('INT', 'type of interrupt')
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polarity = Param.X86IntelMPPolarity('ConformPolarity', 'polarity')
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trigger = Param.X86IntelMPTriggerMode('ConformTrigger', 'trigger mode')
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source_bus_id = Param.UInt8(0,
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'id of the bus from which the interrupt signal comes')
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source_bus_irq = Param.UInt8(0,
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'which interrupt signal from the source bus')
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dest_io_apic_id = Param.UInt8(0,
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'id of the IO APIC the interrupt is going to')
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dest_io_apic_intin = Param.UInt8(0,
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'the INTIN pin on the IO APIC the interrupt is connected to')
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class X86IntelMPLocalIntAssignment(X86IntelMPBaseConfigEntry):
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type = 'X86IntelMPLocalIntAssignment'
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cxx_class = 'X86ISA::IntelMP::LocalIntAssignment'
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interrupt_type = Param.X86IntelMPInterruptType('INT', 'type of interrupt')
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polarity = Param.X86IntelMPPolarity('ConformPolarity', 'polarity')
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trigger = Param.X86IntelMPTriggerMode('ConformTrigger', 'trigger mode')
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source_bus_id = Param.UInt8(0,
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'id of the bus from which the interrupt signal comes')
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source_bus_irq = Param.UInt8(0,
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'which interrupt signal from the source bus')
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dest_local_apic_id = Param.UInt8(0,
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'id of the local APIC the interrupt is going to')
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dest_local_apic_intin = Param.UInt8(0,
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'the INTIN pin on the local APIC the interrupt is connected to')
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class X86IntelMPAddressType(Enum):
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map = {"IOAddress" : 0,
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"MemoryAddress" : 1,
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"PrefetchAddress" : 2
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}
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class X86IntelMPAddrSpaceMapping(X86IntelMPExtConfigEntry):
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type = 'X86IntelMPAddrSpaceMapping'
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cxx_class = 'X86ISA::IntelMP::AddrSpaceMapping'
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bus_id = Param.UInt8(0, 'id of the bus the address space is mapped to')
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address_type = Param.X86IntelMPAddressType('IOAddress',
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'address type used to access bus')
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address = Param.Addr(0, 'starting address of the mapping')
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length = Param.UInt64(0, 'length of mapping in bytes')
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class X86IntelMPBusHierarchy(X86IntelMPExtConfigEntry):
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type = 'X86IntelMPBusHierarchy'
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cxx_class = 'X86ISA::IntelMP::BusHierarchy'
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bus_id = Param.UInt8(0, 'id of the bus being described')
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subtractive_decode = Param.Bool(False,
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'whether this bus contains all addresses not used by its children')
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parent_bus = Param.UInt8(0, 'bus id of this busses parent')
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class X86IntelMPRangeList(Enum):
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map = {"ISACompatible" : 0,
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"VGACompatible" : 1
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}
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class X86IntelMPCompatAddrSpaceMod(X86IntelMPExtConfigEntry):
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type = 'X86IntelMPCompatAddrSpaceMod'
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cxx_class = 'X86ISA::IntelMP::CompatAddrSpaceMod'
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bus_id = Param.UInt8(0, 'id of the bus being described')
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add = Param.Bool(False,
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'if the range should be added to the original mapping')
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range_list = Param.X86IntelMPRangeList('ISACompatible',
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'which predefined range of addresses to use')
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